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Wed, 14 Feb 2024 13:52:14 +0900 (KST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Subject: [PATCH] perf: CXL: fix CPMU filter value mask length Reply-To: hj96.nam@samsung.com Sender: Hojin Nam From: Hojin Nam To: "linux-cxl@vger.kernel.org" , "jonathan.cameron@huawei.com" CC: Wonjae Lee , KyungSan Kim , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "will@kernel.org" , "mark.rutland@arm.com" X-Priority: 3 X-Content-Kind-Code: NORMAL X-CPGS-Detection: blocking_info_exchange X-Drm-Type: N,general X-Msg-Generator: Mail X-Msg-Type: PERSONAL X-Reply-Demand: N Message-ID: <20240214045214epcms2p81d2ea826483fb4aecf19930f2755d55b@epcms2p8> Date: Wed, 14 Feb 2024 13:52:14 +0900 X-CMS-MailID: 20240214045214epcms2p81d2ea826483fb4aecf19930f2755d55b X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupik+LIzCtJLcpLzFFi42LZdljTQvef25lUg3mNwharFl5jszi6h8Ni 0+NrrBbnZ51isbi8aw6bxdLrF5ksWu6YWmy8/47NgcNjzbw1jB4tR96yemxa1cnmsXlJvUff llWMHp83yQWwRWXbZKQmpqQWKaTmJeenZOal2yp5B8c7x5uaGRjqGlpamCsp5CXmptoqufgE 6Lpl5gBdo6RQlphTChQKSCwuVtK3synKLy1JVcjILy6xVUotSMkpMC/QK07MLS7NS9fLSy2x MjQwMDIFKkzIzpiwybrgEl/FtJVTWBsYv3N1MXJwSAiYSOx7otLFyMUhJLCDUeJl51wWkDiv gKDE3x3CXYycHMICthI7Ds5nBrGFBOQk9pw4zwIR15BY+/0wO4jNJqAmsfD+JbAaEYEqievv nzKBzGQW2MYk8ffhUkaQhIQAr8SM9qcsELa0xPblW6HiGhI/lvUyQ9iiEjdXv2WHsd8fmw9V IyLReu8sVI2gxIOfu6HiUhKf7m6CihdLzN6/DCpeILHixyKoXfoSjdffs0H85Stx7bI/SJhF QFViyYtOVogSF4lvM9aB2cwC8hLb385hBilnFtCUWL9LHxJSyhJHbrFAVPBJdBz+yw7z1I55 T5ggbCWJ/R2tUMdISNw5cRnqGA+Jm20rWCAhGCjx8Nh7xgmMCrMQ4TwLyd5ZCHsXMDKvYhRL LSjOTU8tNiowgUdscn7uJkZwotTy2ME4++0HvUOMTByMhxglOJiVRHgvzTiRKsSbklhZlVqU H19UmpNafIjRFOjjicxSosn5wFSdVxJvaGJpYGJmZmhuZGpgriTOe691boqQQHpiSWp2ampB ahFMHxMHp1QD04QjF7lnLg8V93XNMfIW70xiytO4dCfBt6b82dd7d7MqQnuiQx5Olt41ReLY Rm2dly+KBKW72nfcOnuvXW7WZ6v/heoJrPVHtX63rHKyvH1/1g/WU6Icko+TPv1zU9+rMKfj g46A9iS+TSvLu365f+HYuT9rZVNgjfJKrQ2+RXNldkVpC98TqSzlZ9+VeOL1rtcVmW88WPb/ 2vpcVrPWc6bunJzO1cdbvSKcf/Nk3c2oqssMv27pNHPu5/2LFpiunxDy6tG//PLoKhapsNi5 YYKlShyuTYJCRmp/bln08/z1t1fnNbtg+PF4u0bOtGk/ispiWk8Jr1tUNmuHnXrpLM/rB07H iS32n3NvdWGAEktxRqKhFnNRcSIAgqannR0EAAA= DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240214045214epcms2p81d2ea826483fb4aecf19930f2755d55b References: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790848641949800329 X-GMAIL-MSGID: 1790848641949800329 CPMU filter value is described as 4B length in CXL r3.0 8.2.7.2.2. However, it is used as 2B length in code and comments. Fixes: 5d7107c72796 ("perf: CXL Performance Monitoring Unit driver") Signed-off-by: Hojin Nam Reviewed-by: Jonathan Cameron --- drivers/perf/cxl_pmu.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.34.1 diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index 365d964b0f6a..ca5e92f28b4a 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -59,7 +59,7 @@ #define CXL_PMU_COUNTER_CFG_EVENT_GRP_ID_IDX_MSK GENMASK_ULL(63, 59) #define CXL_PMU_FILTER_CFG_REG(n, f) (0x400 + 4 * ((f) + (n) * 8)) -#define CXL_PMU_FILTER_CFG_VALUE_MSK GENMASK(15, 0) +#define CXL_PMU_FILTER_CFG_VALUE_MSK GENMASK(31, 0) #define CXL_PMU_COUNTER_REG(n) (0xc00 + 8 * (n)) @@ -314,9 +314,9 @@ static bool cxl_pmu_config1_get_edge(struct perf_event *event) } /* - * CPMU specification allows for 8 filters, each with a 16 bit value... - * So we need to find 8x16bits to store it in. - * As the value used for disable is 0xffff, a separate enable switch + * CPMU specification allows for 8 filters, each with a 32 bit value... + * So we need to find 8x32bits to store it in. + * As the value used for disable is 0xffff_ffff, a separate enable switch * is needed. */ @@ -642,7 +642,7 @@ static void cxl_pmu_event_start(struct perf_event *event, int flags) if (cxl_pmu_config1_hdm_filter_en(event)) cfg = cxl_pmu_config2_get_hdm_decoder(event); else - cfg = GENMASK(15, 0); /* No filtering if 0xFFFF_FFFF */ + cfg = GENMASK(31, 0); /* No filtering if 0xFFFF_FFFF */ writeq(cfg, base + CXL_PMU_FILTER_CFG_REG(hwc->idx, 0)); }