[v10,2/4] dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings
Commit Message
From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Introduce bindings for TCM memory address space on AMD-xilinx Zynq
UltraScale+ platform. It will help in defining TCM in device-tree
and make it's access platform agnostic and data-driven.
Tightly-coupled memories(TCMs) are low-latency memory that provides
predictable instruction execution and predictable data load/store
timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
The TCM resources(reg, reg-names and power-domain) are documented for
each TCM in the R5 node. The reg and reg-names are made as required
properties as we don't want to hardcode TCM addresses for future
platforms and for zu+ legacy implementation will ensure that the
old dts w/o reg/reg-names works and stable ABI is maintained.
It also extends the examples for TCM split and lockstep modes.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
---
Changes in v10:
- modify number of "reg", "reg-names" and "power-domains" entries
based on cluster mode
- Add extra optional atcm and btcm in "reg" property for lockstep mode
- Add "reg-names" for extra optional atcm and btcm for lockstep mode
- Drop previous Ack as bindings has new change
Changes in v9:
- None
Changes in v8:
- None
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Use address-cells and size-cells value 2
- Modify ranges property as per new value of address-cells
and size-cells
- Modify child node "reg" property accordingly
- Remove previous ack for further review
v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
.../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
1 file changed, 170 insertions(+), 22 deletions(-)
Comments
On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
>
> Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> UltraScale+ platform. It will help in defining TCM in device-tree
> and make it's access platform agnostic and data-driven.
>
> Tightly-coupled memories(TCMs) are low-latency memory that provides
> predictable instruction execution and predictable data load/store
> timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
> banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
>
> The TCM resources(reg, reg-names and power-domain) are documented for
> each TCM in the R5 node. The reg and reg-names are made as required
> properties as we don't want to hardcode TCM addresses for future
> platforms and for zu+ legacy implementation will ensure that the
> old dts w/o reg/reg-names works and stable ABI is maintained.
>
> It also extends the examples for TCM split and lockstep modes.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> ---
>
> Changes in v10:
> - modify number of "reg", "reg-names" and "power-domains" entries
> based on cluster mode
> - Add extra optional atcm and btcm in "reg" property for lockstep mode
> - Add "reg-names" for extra optional atcm and btcm for lockstep mode
> - Drop previous Ack as bindings has new change
>
> Changes in v9:
> - None
> Changes in v8:
> - None
> Changes in v7:
> - None
> Changes in v6:
> - None
> Changes in v5:
> - None
>
> Changes in v4:
> - Use address-cells and size-cells value 2
> - Modify ranges property as per new value of address-cells
> and size-cells
> - Modify child node "reg" property accordingly
> - Remove previous ack for further review
>
> v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
>
> .../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
> 1 file changed, 170 insertions(+), 22 deletions(-)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml:118:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240213175450.3097308-3-tanmay.shah@amd.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
Hello,
Thanks for reviews please find my comments below.
On 2/13/24 1:20 PM, Rob Herring wrote:
> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> > From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> >
> > Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> > UltraScale+ platform. It will help in defining TCM in device-tree
> > and make it's access platform agnostic and data-driven.
> >
> > Tightly-coupled memories(TCMs) are low-latency memory that provides
> > predictable instruction execution and predictable data load/store
> > timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
> > banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
> >
> > The TCM resources(reg, reg-names and power-domain) are documented for
> > each TCM in the R5 node. The reg and reg-names are made as required
> > properties as we don't want to hardcode TCM addresses for future
> > platforms and for zu+ legacy implementation will ensure that the
> > old dts w/o reg/reg-names works and stable ABI is maintained.
> >
> > It also extends the examples for TCM split and lockstep modes.
> >
> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > ---
> >
> > Changes in v10:
> > - modify number of "reg", "reg-names" and "power-domains" entries
> > based on cluster mode
> > - Add extra optional atcm and btcm in "reg" property for lockstep mode
> > - Add "reg-names" for extra optional atcm and btcm for lockstep mode
> > - Drop previous Ack as bindings has new change
> >
> > Changes in v9:
> > - None
> > Changes in v8:
> > - None
> > Changes in v7:
> > - None
> > Changes in v6:
> > - None
> > Changes in v5:
> > - None
> >
> > Changes in v4:
> > - Use address-cells and size-cells value 2
> > - Modify ranges property as per new value of address-cells
> > and size-cells
> > - Modify child node "reg" property accordingly
> > - Remove previous ack for further review
> >
> > v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
> >
> > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
> > 1 file changed, 170 insertions(+), 22 deletions(-)
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml:118:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
Ack. I will fix this.
However, can I still get reviews on patch itself so if something else needs to be fixed I can fix in next revision as well.
Also, I tried to run yamllint with following command:
make DT_CHECKER_FLAGS=-m dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml O=../build/zynqmp/linux-next/
However, I see following logs without any error on bindings:
LINT Documentation/devicetree/bindings
invalid config: unknown option "required" for rule "quoted-strings"
*xargs: /usr/bin/yamllint: exited with status 255; aborting*
CHKDT Documentation/devicetree/bindings/processed-schema.json
SCHEMA Documentation/devicetree/bindings/processed-schema.json
DTEX Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.example.dts
DTC_CHK Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.example.dtb
I am not sure if my system is missing something but, yamllint tool is failing.
I appreciate if someone can point to quick fix if this is known issue and is already resolved.
Thanks,
Tanmay
> dtschema/dtc warnings/errors:
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240213175450.3097308-3-tanmay.shah@amd.com
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
>
On Tue, Feb 13, 2024 at 02:37:49PM -0600, Tanmay Shah wrote:
> Hello,
>
> Thanks for reviews please find my comments below.
>
> On 2/13/24 1:20 PM, Rob Herring wrote:
> > On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> > > From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> > >
> > > Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> > > UltraScale+ platform. It will help in defining TCM in device-tree
> > > and make it's access platform agnostic and data-driven.
> > >
> > > Tightly-coupled memories(TCMs) are low-latency memory that provides
> > > predictable instruction execution and predictable data load/store
> > > timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
> > > banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
> > >
> > > The TCM resources(reg, reg-names and power-domain) are documented for
> > > each TCM in the R5 node. The reg and reg-names are made as required
> > > properties as we don't want to hardcode TCM addresses for future
> > > platforms and for zu+ legacy implementation will ensure that the
> > > old dts w/o reg/reg-names works and stable ABI is maintained.
> > >
> > > It also extends the examples for TCM split and lockstep modes.
> > >
> > > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> > > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > > ---
> > >
> > > Changes in v10:
> > > - modify number of "reg", "reg-names" and "power-domains" entries
> > > based on cluster mode
> > > - Add extra optional atcm and btcm in "reg" property for lockstep mode
> > > - Add "reg-names" for extra optional atcm and btcm for lockstep mode
> > > - Drop previous Ack as bindings has new change
> > >
> > > Changes in v9:
> > > - None
> > > Changes in v8:
> > > - None
> > > Changes in v7:
> > > - None
> > > Changes in v6:
> > > - None
> > > Changes in v5:
> > > - None
> > >
> > > Changes in v4:
> > > - Use address-cells and size-cells value 2
> > > - Modify ranges property as per new value of address-cells
> > > and size-cells
> > > - Modify child node "reg" property accordingly
> > > - Remove previous ack for further review
> > >
> > > v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
> > >
> > > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
> > > 1 file changed, 170 insertions(+), 22 deletions(-)
> > >
> >
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >
> > yamllint warnings/errors:
> > ./Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml:118:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
> Ack. I will fix this.
>
> However, can I still get reviews on patch itself so if something else needs to be fixed I can fix in next revision as well.
>
> Also, I tried to run yamllint with following command:
>
> make DT_CHECKER_FLAGS=-m dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml O=../build/zynqmp/linux-next/
>
>
> However, I see following logs without any error on bindings:
>
> LINT Documentation/devicetree/bindings
> invalid config: unknown option "required" for rule "quoted-strings"
> *xargs: /usr/bin/yamllint: exited with status 255; aborting*
> CHKDT Documentation/devicetree/bindings/processed-schema.json
> SCHEMA Documentation/devicetree/bindings/processed-schema.json
> DTEX Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.example.dts
> DTC_CHK Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.example.dtb
>
> I am not sure if my system is missing something but, yamllint tool is failing.
"unknown option" means old version of yamllint.
Rob
On 13/02/2024 21:37, Tanmay Shah wrote:
> Hello,
>
> Thanks for reviews please find my comments below.
>
> On 2/13/24 1:20 PM, Rob Herring wrote:
>> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
>>> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
>>>
>>> Introduce bindings for TCM memory address space on AMD-xilinx Zynq
>>> UltraScale+ platform. It will help in defining TCM in device-tree
>>> and make it's access platform agnostic and data-driven.
>>>
>>> Tightly-coupled memories(TCMs) are low-latency memory that provides
>>> predictable instruction execution and predictable data load/store
>>> timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
>>> banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
>>>
>>> The TCM resources(reg, reg-names and power-domain) are documented for
>>> each TCM in the R5 node. The reg and reg-names are made as required
>>> properties as we don't want to hardcode TCM addresses for future
>>> platforms and for zu+ legacy implementation will ensure that the
>>> old dts w/o reg/reg-names works and stable ABI is maintained.
>>>
>>> It also extends the examples for TCM split and lockstep modes.
>>>
>>> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
>>> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
>>> ---
>>>
>>> Changes in v10:
>>> - modify number of "reg", "reg-names" and "power-domains" entries
>>> based on cluster mode
>>> - Add extra optional atcm and btcm in "reg" property for lockstep mode
>>> - Add "reg-names" for extra optional atcm and btcm for lockstep mode
>>> - Drop previous Ack as bindings has new change
>>>
>>> Changes in v9:
>>> - None
>>> Changes in v8:
>>> - None
>>> Changes in v7:
>>> - None
>>> Changes in v6:
>>> - None
>>> Changes in v5:
>>> - None
>>>
>>> Changes in v4:
>>> - Use address-cells and size-cells value 2
>>> - Modify ranges property as per new value of address-cells
>>> and size-cells
>>> - Modify child node "reg" property accordingly
>>> - Remove previous ack for further review
>>>
>>> v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
>>>
>>> .../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
>>> 1 file changed, 170 insertions(+), 22 deletions(-)
>>>
>>
>> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
>> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>>
>> yamllint warnings/errors:
>> ./Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml:118:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
> Ack. I will fix this.
>
> However, can I still get reviews on patch itself so if something else needs to be fixed I can fix in next revision as well.
Sorry, I have too many patches to review to provide feedback on work
which does not build/compile/test. First use automated tooling, like
building a C code, to detect as many issues as possible then ask for
reviewing. Not the other way around.
Best regards,
Krzysztof
On 2/15/24 3:06 AM, Krzysztof Kozlowski wrote:
> On 13/02/2024 21:37, Tanmay Shah wrote:
> > Hello,
> >
> > Thanks for reviews please find my comments below.
> >
> > On 2/13/24 1:20 PM, Rob Herring wrote:
> >> On Tue, 13 Feb 2024 09:54:48 -0800, Tanmay Shah wrote:
> >>> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> >>>
> >>> Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> >>> UltraScale+ platform. It will help in defining TCM in device-tree
> >>> and make it's access platform agnostic and data-driven.
> >>>
> >>> Tightly-coupled memories(TCMs) are low-latency memory that provides
> >>> predictable instruction execution and predictable data load/store
> >>> timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
> >>> banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
> >>>
> >>> The TCM resources(reg, reg-names and power-domain) are documented for
> >>> each TCM in the R5 node. The reg and reg-names are made as required
> >>> properties as we don't want to hardcode TCM addresses for future
> >>> platforms and for zu+ legacy implementation will ensure that the
> >>> old dts w/o reg/reg-names works and stable ABI is maintained.
> >>>
> >>> It also extends the examples for TCM split and lockstep modes.
> >>>
> >>> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> >>> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> >>> ---
> >>>
> >>> Changes in v10:
> >>> - modify number of "reg", "reg-names" and "power-domains" entries
> >>> based on cluster mode
> >>> - Add extra optional atcm and btcm in "reg" property for lockstep mode
> >>> - Add "reg-names" for extra optional atcm and btcm for lockstep mode
> >>> - Drop previous Ack as bindings has new change
> >>>
> >>> Changes in v9:
> >>> - None
> >>> Changes in v8:
> >>> - None
> >>> Changes in v7:
> >>> - None
> >>> Changes in v6:
> >>> - None
> >>> Changes in v5:
> >>> - None
> >>>
> >>> Changes in v4:
> >>> - Use address-cells and size-cells value 2
> >>> - Modify ranges property as per new value of address-cells
> >>> and size-cells
> >>> - Modify child node "reg" property accordingly
> >>> - Remove previous ack for further review
> >>>
> >>> v4 link: https://lore.kernel.org/all/20230829181900.2561194-2-tanmay.shah@amd.com/
> >>>
> >>> .../remoteproc/xlnx,zynqmp-r5fss.yaml | 192 ++++++++++++++++--
> >>> 1 file changed, 170 insertions(+), 22 deletions(-)
> >>>
> >>
> >> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> >> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >>
> >> yamllint warnings/errors:
> >> ./Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml:118:13: [warning] wrong indentation: expected 10 but found 12 (indentation)
> > Ack. I will fix this.
> >
> > However, can I still get reviews on patch itself so if something else needs to be fixed I can fix in next revision as well.
>
> Sorry, I have too many patches to review to provide feedback on work
> which does not build/compile/test. First use automated tooling, like
> building a C code, to detect as many issues as possible then ask for
> reviewing. Not the other way around.
Ack. I will send new revision fixing the warning.
Thanks.
>
> Best regards,
> Krzysztof
@@ -20,9 +20,21 @@ properties:
compatible:
const: xlnx,zynqmp-r5fss
+ "#address-cells":
+ const: 2
+
+ "#size-cells":
+ const: 2
+
+ ranges:
+ description: |
+ Standard ranges definition providing address translations for
+ local R5F TCM address spaces to bus addresses.
+
xlnx,cluster-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
+ default: 1
description: |
The RPU MPCore can operate in split mode (Dual-processor performance), Safety
lock-step mode(Both RPU cores execute the same code in lock-step,
@@ -37,7 +49,7 @@ properties:
2: single cpu mode
patternProperties:
- "^r5f-[a-f0-9]+$":
+ "^r5f@[0-9a-f]+$":
type: object
description: |
The RPU is located in the Low Power Domain of the Processor Subsystem.
@@ -54,9 +66,6 @@ patternProperties:
compatible:
const: xlnx,zynqmp-r5f
- power-domains:
- maxItems: 1
-
mboxes:
minItems: 1
items:
@@ -101,35 +110,174 @@ patternProperties:
required:
- compatible
- - power-domains
- unevaluatedProperties: false
+allOf:
+ - if:
+ properties:
+ xlnx,cluster-mode:
+ enum:
+ - 1
+ then:
+ patternProperties:
+ "^r5f@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ minItems: 1
+ items:
+ - description: ATCM internal memory
+ - description: BTCM internal memory
+ - description: extra ATCM memory in lockstep mode
+ - description: extra BTCM memory in lockstep mode
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: atcm0
+ - const: btcm0
+ - const: atcm1
+ - const: btcm1
+
+ power-domains:
+ minItems: 2
+ maxItems: 5
+
+ required:
+ - reg
+ - reg-names
+ - power-domains
+
+ else:
+ patternProperties:
+ "^r5f@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ minItems: 1
+ items:
+ - description: ATCM internal memory
+ - description: BTCM internal memory
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: atcm0
+ - const: btcm0
+
+ power-domains:
+ minItems: 2
+ maxItems: 3
+
+ required:
+ - reg
+ - reg-names
+ - power-domains
required:
- compatible
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
additionalProperties: false
examples:
- |
- remoteproc {
- compatible = "xlnx,zynqmp-r5fss";
- xlnx,cluster-mode = <1>;
-
- r5f-0 {
- compatible = "xlnx,zynqmp-r5f";
- power-domains = <&zynqmp_firmware 0x7>;
- memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
- mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
- mbox-names = "tx", "rx";
+ #include <dt-bindings/power/xlnx-zynqmp-power.h>
+
+ // Split mode configuration
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ remoteproc@ffe00000 {
+ compatible = "xlnx,zynqmp-r5fss";
+ xlnx,cluster-mode = <0>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
+ <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
+ <0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
+ <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
+
+ r5f@0 {
+ compatible = "xlnx,zynqmp-r5f";
+ reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
+ reg-names = "atcm0", "btcm0";
+ power-domains = <&zynqmp_firmware PD_RPU_0>,
+ <&zynqmp_firmware PD_R5_0_ATCM>,
+ <&zynqmp_firmware PD_R5_0_BTCM>;
+ memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
+ <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
+ mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
+ mbox-names = "tx", "rx";
+ };
+
+ r5f@1 {
+ compatible = "xlnx,zynqmp-r5f";
+ reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
+ reg-names = "atcm0", "btcm0";
+ power-domains = <&zynqmp_firmware PD_RPU_1>,
+ <&zynqmp_firmware PD_R5_1_ATCM>,
+ <&zynqmp_firmware PD_R5_1_BTCM>;
+ memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
+ <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
+ mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
+ mbox-names = "tx", "rx";
+ };
};
+ };
+
+ - |
+ //Lockstep configuration
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ remoteproc@ffe00000 {
+ compatible = "xlnx,zynqmp-r5fss";
+ xlnx,cluster-mode = <1>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
+ <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
+ <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
+ <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
+
+ r5f@0 {
+ compatible = "xlnx,zynqmp-r5f";
+ reg = <0x0 0x0 0x0 0x10000>,
+ <0x0 0x20000 0x0 0x10000>,
+ <0x0 0x10000 0x0 0x10000>,
+ <0x0 0x30000 0x0 0x10000>;
+ reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
+ power-domains = <&zynqmp_firmware PD_RPU_0>,
+ <&zynqmp_firmware PD_R5_0_ATCM>,
+ <&zynqmp_firmware PD_R5_0_BTCM>,
+ <&zynqmp_firmware PD_R5_1_ATCM>,
+ <&zynqmp_firmware PD_R5_1_BTCM>;
+ memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
+ <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
+ mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
+ mbox-names = "tx", "rx";
+ };
- r5f-1 {
- compatible = "xlnx,zynqmp-r5f";
- power-domains = <&zynqmp_firmware 0x8>;
- memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
- mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
- mbox-names = "tx", "rx";
+ r5f@1 {
+ compatible = "xlnx,zynqmp-r5f";
+ reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
+ reg-names = "atcm0", "btcm0";
+ power-domains = <&zynqmp_firmware PD_RPU_1>,
+ <&zynqmp_firmware PD_R5_1_ATCM>,
+ <&zynqmp_firmware PD_R5_1_BTCM>;
+ memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
+ <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
+ mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
+ mbox-names = "tx", "rx";
+ };
};
};
...