From patchwork Tue Feb 13 16:32:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 200525 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp670202dyb; Tue, 13 Feb 2024 08:57:03 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVI4gbWx+9rM8D6J0FBKKqyMpyX6p/jA+ZGdrYVtEvo4OsJQVke9vSFz0ReSeivdbT6eFF3hpejGPcPt1VlqLdf1extHA== X-Google-Smtp-Source: AGHT+IEASEg9S+/CRClfXgj7oxFaop9PvLY+xZjXcTJMZVaboD+hj/xiTS43HN3SlaDEjR5k97ul X-Received: by 2002:a05:6359:1010:b0:179:24b4:4203 with SMTP id ib16-20020a056359101000b0017924b44203mr12826163rwb.0.1707843422927; Tue, 13 Feb 2024 08:57:02 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707843422; cv=pass; d=google.com; s=arc-20160816; b=TybrlHLyDyB82WA6m7bPWr3M2gtE+lzgYOWHkwovLeD5tT4hq7NoAYqVIW4UlYD6AA QEoZhqEboK6MXLZ7lDK9hotjv+8tXyshMCl4IsfS8GP8JcsLudrpgHGcZUKZCAQbuR/e PhiiW7k4dNj6+l13pk6a+Xbu5x5O12ENktzeb+EDT9gql4uWNErKqnxwGVSSHytY1nq1 giy19Di0EjHDFRsnnIa72KVFI8qNBWU2rWOpy2Ip47vN4+Tj5sGXlW2gur6OB53wbXOv i5yvZpnOYC0ExHhOsV2Mr8CYf19dkUofYG+uNOWGHKSu2z509jPPmXHwG2DWvnb6bk8e vlig== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=6Ui8KZvCuswjskY0tb3GPzWxjk6Aw0zhphPdQYBx0oA=; fh=BZVLyEL9xsQwue6GuyikjdsFFHSOYh5061aiaRkopSs=; b=gZUINprYGSTCuJUXV28o6uX5us+7iM5KXWDVcqoFcVoH9jZPUYgG/w4CkRP6mTb9zg v/Fhf1lTQx9WdFj2Y51uP4UnM5TmpvTItxnOwL/KKQwUQ9DFTw2RiGqyNts15oaiIFO7 hNvaZtJjuG5S3ZOV8oUHMZ6bEyFqYMWY4KWVnEuBr/XB7T46CoFtNS923xajAnMucWrE IZwbTcNVL+T5tg/jEzBu6d3Mvl7XMyUrXMzMEbjngXeyjLG4fPg2KWDVyeSpfu6+mwJO xoTqcSwR/R3Wr0tZ5YW3xasSfI6eHwd/HS5GQqVLbt8rEDwR7EFyhUlGA1Jdgd4Fiwtp 53Lw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=S2xfl0ep; arc=pass (i=1 spf=pass spfdomain=collabora.com dkim=pass dkdomain=collabora.com dmarc=pass fromdomain=collabora.com); spf=pass (google.com: domain of linux-kernel+bounces-63902-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-63902-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com X-Forwarded-Encrypted: i=2; AJvYcCXdVGatNHKuq5ESw/lesoErC/zjCkx1nKeWWnpj05FKxmTWdqkI3n8bITjaAu9MAk0slrBXeFgWzIYoFopbcLIXVE/9uQ== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id bx24-20020a056a02051800b005cfda2f8f08si2276183pgb.452.2024.02.13.08.57.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 08:57:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-63902-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=S2xfl0ep; arc=pass (i=1 spf=pass spfdomain=collabora.com dkim=pass dkdomain=collabora.com dmarc=pass fromdomain=collabora.com); spf=pass (google.com: domain of linux-kernel+bounces-63902-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-63902-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 95D2EB295D4 for ; Tue, 13 Feb 2024 16:39:18 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 929B460907; Tue, 13 Feb 2024 16:36:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="S2xfl0ep" Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27A535FDC4; Tue, 13 Feb 2024 16:36:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707842178; cv=none; b=unPVn+Wq1XVQbVvA0ok2iIBMpcftnI4KT5GkT/zETkSxh/ekkOz3Lu5N8GD7h85cBCZqSJZYFG/8eiZcJ/lEHbm6rjLr1dHqnrRQ8xYOQRixCl+2zj95W4xeRK36Hc1QoNnEpn0MkBmWAU5bUF/GlMGGoSWEmbOVjE0vnmPnuNI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707842178; c=relaxed/simple; bh=9GIaZfb5MxaHk0HlZKmjPL8R5F9ty2wgWUAueDtNB0c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SZ1UbQWJD1o7I6mxMorOk/S02omke82ZPaF2Gmxz2iSKBaVS1rPWnENA7Y55GqSB/ybeCMF5ZeGZ+ZEPSCiA4GLhNQhaWXuGoKkAwvSJafURbxmxWS8/hiImxNP0RxqoqnaIkUMBuG/+Z35+1zNph75T/E7tkUj0SzM8nbxzfvU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=S2xfl0ep; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1707842172; bh=9GIaZfb5MxaHk0HlZKmjPL8R5F9ty2wgWUAueDtNB0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S2xfl0epJDEPlTbi959f6Xv3staoTFgeBv6kT8j3sHzqLxbsplruB8kuRmGBcDojL lTQqHsVOLmzAsMvRbMt9wetlcNj5xFMJONYM+Anjc7PH9np+umH73xqzzYv9FzWYtS KyXbxjx6DwgR2HEPtNVyy+hmfJRcbDgrYX3HATHtQLq4tJNuxM6ZxgsvRHDRyNHud9 L1BB5pe7UaAmU2mVZWYec817cuRjzIYZZG4ktaWKqG+0Cd5BsMKGeLUW3A07HzhJIQ Sif161eI4f3Fk0eLVOY+tbqRjbmfwMVonb8DnIOOKhwLgmtrIJwiUv74faorUqYYzZ IO9kdeLwY12qA== Received: from jupiter.universe (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 04E2A3782080; Tue, 13 Feb 2024 16:36:12 +0000 (UTC) Received: by jupiter.universe (Postfix, from userid 1000) id 08CDD4800D6; Tue, 13 Feb 2024 17:36:11 +0100 (CET) From: Sebastian Reichel To: Heiko Stuebner , Vinod Koul , Kishon Vijay Abraham I , linux-rockchip@lists.infradead.org, linux-phy@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Wang , Kever Yang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v2 08/12] arm64: dts: rockchip: add USBDP phys on rk3588 Date: Tue, 13 Feb 2024 17:32:42 +0100 Message-ID: <20240213163609.44930-9-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213163609.44930-1-sebastian.reichel@collabora.com> References: <20240213163609.44930-1-sebastian.reichel@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790803625183302392 X-GMAIL-MSGID: 1790803625183302392 Add both USB3-DisplayPort PHYs to RK3588 SoC DT. Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 61 +++++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 72 +++++++++++++++++++++++ 2 files changed, 133 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 5519c1430cb7..cec4dab097ae 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -17,6 +17,36 @@ pipe_phy1_grf: syscon@fd5c0000 { reg = <0x0 0xfd5c0000 0x0 0x100>; }; + usbdpphy1_grf: syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; + reg = <0x0 0xfd5cc000 0x0 0x4000>; + }; + + usb2phy1_grf: syscon@fd5d4000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; + reg = <0x0 0xfd5d4000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy1: usb2phy@4000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x4000 0x10>; + #clock-cells = <0>; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy1"; + interrupts = ; + resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>; + reset-names = "phy", "apb"; + status = "disabled"; + + u2phy1_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + i2s8_8ch: i2s@fddc8000 { compatible = "rockchip,rk3588-i2s-tdm"; reg = <0x0 0xfddc8000 0x0 0x1000>; @@ -310,6 +340,37 @@ sata-port@0 { }; }; + usbdp_phy1: phy@fed90000 { + compatible = "rockchip,rk3588-usbdp-phy"; + reg = <0x0 0xfed90000 0x0 0x10000>; + clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, + <&cru CLK_USBDP_PHY1_IMMORTAL>, + <&cru PCLK_USBDPPHY1>, + <&u2phy1>; + clock-names = "refclk", "immortal", "pclk", "utmi"; + resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>, + <&cru SRST_USBDP_COMBO_PHY1_CMN>, + <&cru SRST_USBDP_COMBO_PHY1_LANE>, + <&cru SRST_USBDP_COMBO_PHY1_PCS>, + <&cru SRST_P_USBDPPHY1>; + reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; + rockchip,u2phy-grf = <&usb2phy1_grf>; + rockchip,usb-grf = <&usb_grf>; + rockchip,usbdpphy-grf = <&usbdpphy1_grf>; + rockchip,vo-grf = <&vo0_grf>; + status = "disabled"; + + usbdp_phy1_dp: dp-port { + #phy-cells = <0>; + status = "disabled"; + }; + + usbdp_phy1_u3: usb3-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + combphy1_ps: phy@fee10000 { compatible = "rockchip,rk3588-naneng-combphy"; reg = <0x0 0xfee10000 0x0 0x100>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 8708436dd545..d384450d08b7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -516,11 +516,22 @@ vop_grf: syscon@fd5a4000 { reg = <0x0 0xfd5a4000 0x0 0x2000>; }; + vo0_grf: syscon@fd5a6000 { + compatible = "rockchip,rk3588-vo-grf", "syscon"; + reg = <0x0 0xfd5a6000 0x0 0x2000>; + clocks = <&cru PCLK_VO0GRF>; + }; + vo1_grf: syscon@fd5a8000 { compatible = "rockchip,rk3588-vo-grf", "syscon"; reg = <0x0 0xfd5a8000 0x0 0x100>; }; + usb_grf: syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf", "syscon"; + reg = <0x0 0xfd5ac000 0x0 0x4000>; + }; + php_grf: syscon@fd5b0000 { compatible = "rockchip,rk3588-php-grf", "syscon"; reg = <0x0 0xfd5b0000 0x0 0x1000>; @@ -536,6 +547,36 @@ pipe_phy2_grf: syscon@fd5c4000 { reg = <0x0 0xfd5c4000 0x0 0x100>; }; + usbdpphy0_grf: syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; + reg = <0x0 0xfd5c8000 0x0 0x4000>; + }; + + usb2phy0_grf: syscon@fd5d0000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; + reg = <0x0 0xfd5d0000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy0: usb2phy@0 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x0 0x10>; + #clock-cells = <0>; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy0"; + interrupts = ; + resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>; + reset-names = "phy", "apb"; + status = "disabled"; + + u2phy0_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + usb2phy2_grf: syscon@fd5d8000 { compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; reg = <0x0 0xfd5d8000 0x0 0x4000>; @@ -2360,6 +2401,37 @@ dmac2: dma-controller@fed10000 { #dma-cells = <1>; }; + usbdp_phy0: phy@fed80000 { + compatible = "rockchip,rk3588-usbdp-phy"; + reg = <0x0 0xfed80000 0x0 0x10000>; + clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, + <&cru CLK_USBDP_PHY0_IMMORTAL>, + <&cru PCLK_USBDPPHY0>, + <&u2phy0>; + clock-names = "refclk", "immortal", "pclk", "utmi"; + resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>, + <&cru SRST_USBDP_COMBO_PHY0_CMN>, + <&cru SRST_USBDP_COMBO_PHY0_LANE>, + <&cru SRST_USBDP_COMBO_PHY0_PCS>, + <&cru SRST_P_USBDPPHY0>; + reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; + rockchip,u2phy-grf = <&usb2phy0_grf>; + rockchip,usb-grf = <&usb_grf>; + rockchip,usbdpphy-grf = <&usbdpphy0_grf>; + rockchip,vo-grf = <&vo0_grf>; + status = "disabled"; + + usbdp_phy0_dp: dp-port { + #phy-cells = <0>; + status = "disabled"; + }; + + usbdp_phy0_u3: usb3-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + combphy0_ps: phy@fee00000 { compatible = "rockchip,rk3588-naneng-combphy"; reg = <0x0 0xfee00000 0x0 0x100>;