[v4,5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node
Message ID | 20240213145542.23207-6-mihai.sain@microchip.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:bc8a:b0:106:860b:bbdd with SMTP id dn10csp591969dyb; Tue, 13 Feb 2024 07:00:39 -0800 (PST) X-Google-Smtp-Source: AGHT+IGIShMgMk/VvTym4sVCKexbH5RygGVATkj0EiAeEw4w479iVUiIVkOB64NlmDzNKNQgby2d X-Received: by 2002:a17:90b:1184:b0:298:b0e3:b3fc with SMTP id gk4-20020a17090b118400b00298b0e3b3fcmr1542467pjb.26.1707836439151; Tue, 13 Feb 2024 07:00:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707836439; cv=pass; d=google.com; s=arc-20160816; b=rFw9jNFb24X2AgEd1twWFB7+I2MBMMu+xRkOUPpf8k08775yIH8fh6Idk+Zlt8ivLX kyOWGeYuAymAKrog1adHzifzWLk558ZO5/AU2A4rAZX8Nr7tzR3uJl1XETHH2OIO3FS/ cYZUU1js3AgUbySs+R9f0FSyh1K4TJ/fQkjDn9PTCw6RYuMHaheb0vxD1hcP7Mwz4SzY MU4BWvDn/dLtKx3fC/IqMNPyR89TNbdZ1+NV+J2T7gs6YhFAJaN1j5or1gzqmEdve1gb 4dmmaMyAjTY9jy53ClIBV9b63rlYBbfhD4ucTcxPmNo8RGfNPPSAICSTX6SnXJL6k+2w zlcw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=sIJjQA04+d9Bi8MBjxWyZt9n4DiTSwcoq6K4Uj48X3Q=; fh=MyBfWQjZtXn/uOe5er0o272MYVp/9kwaXytW0cuMjcU=; b=iLG4XCBKg4fuiYDbuKsaok0UrlfNjew8nkwBlsdl5qAtEi+/K/fv/J+d/0r65n487J SmhjiB5cWoT3A/yaaZy7kdh/WGKo0RTy99zq82dRZKS9c7vt2XJjNUMoJ0u7ftqQkRw2 xUkyqxTCJNwvUZcAcuuHtVEZ0ALdca/UqxZJrufZWbu93EBSLaPYJP0Ic9dI1+HkJTOY Bd9i9HIGjt8GPSK5kSuR6D7MBpNfsaXV5tyYUzgCWZt0aUav2YmmlzZuIMcomXbvZGxU AbdQOHXsO+VpRrHypPbAR7nNIkaC0a92dGq4NGLTgHXDBsqkGird5tvy+v1E2kE1B1mZ 6efg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=r0WkNnOU; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=2; AJvYcCV47zP391hkVwaYzWyuC64tmMLjwU5KUyZkoQvGa6p0WE4W8E5sgvWIj8wXERdkpF1iKMu8NB0icBIqhR5hQhHFsZzH1Q== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id c17-20020a17090a8d1100b00296e95152c9si2117556pjo.171.2024.02.13.07.00.38 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 07:00:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=r0WkNnOU; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-63735-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C0DE028E180 for <ouuuleilei@gmail.com>; Tue, 13 Feb 2024 14:57:59 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 70E6C5F863; Tue, 13 Feb 2024 14:56:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="r0WkNnOU" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F5865EE7C; Tue, 13 Feb 2024 14:56:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707836179; cv=none; b=DzRCa1fmKp2PP9IG1RaEXMTb6qQ+a3nDKk52KbwcEvcvE8dyil4xIg/4n8M70WoZGR8RMv7tl4XtGU4Hrt+wU1zM45tzHQet4Z4IQ6qrHyYuM/gzCHJ9eheutMb3BgKcW7ac1/wFmvQdOtxZa+VFCCaYYwDxDWsyNptdxUKaRkc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707836179; c=relaxed/simple; bh=4GHGNBpN50CmynGXCsPvcgdJAlAH6pJHR8epQc++XaI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=icFZqkuvGpRpNFvTA1NLwCHzT7IRuOa1QrLegRIskN3U306qd2Styv3LIFdVcYTHLxwKlPtUHMNBq+t2T2Wrool0cUG6VZ3BawzNipI+pwIZa0lPovs7hLYU+fBCWVEJIgIkGXSFND/7jQCUKrZGyaa/JrrA9GzqirJnjFYwLQI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=r0WkNnOU; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707836178; x=1739372178; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4GHGNBpN50CmynGXCsPvcgdJAlAH6pJHR8epQc++XaI=; b=r0WkNnOUBGlA6meObJ2sD8B1ta//7OuwCVXG5NXFcUW2wrGcKRr4A7in KV17GEiWsAj61qWuaUifkfSLsygk3ESTHevRk+k1PSQvNlBzP/m5WBlBN 0v3VAy4TKDySQplvmo6xoYIilRTaF/bYIkCIutlrvBfCoYdBRkkdtMEmt pJSUB72DWly/GiGs2MGz7zCYhyE6kJNAXKNKHQ2e0ClZZMReLOv0J5jbk jfz7fxF08yKRIgcUAVg3hjMrBS5kJTDjzxhNIgSIj1eOqQdC1y1Gre1oR 8GI/U06mqms0UfcL2RZQyniYvqUcGx4TEg+qvwOw12UddnYOMSToMKgSW Q==; X-CSE-ConnectionGUID: 1b1+m5inQImh9toRpU0rhA== X-CSE-MsgGUID: ePTa0T8jSBa+f3Q8oIUgGQ== X-IronPort-AV: E=Sophos;i="6.06,157,1705388400"; d="scan'208";a="16174935" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Feb 2024 07:56:16 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 13 Feb 2024 07:56:05 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 13 Feb 2024 07:56:02 -0700 From: Mihai Sain <mihai.sain@microchip.com> To: <claudiu.beznea@tuxon.dev>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> CC: <cristian.birsan@microchip.com>, Mihai Sain <mihai.sain@microchip.com> Subject: [PATCH v4 5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node Date: Tue, 13 Feb 2024 16:55:39 +0200 Message-ID: <20240213145542.23207-6-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213145542.23207-1-mihai.sain@microchip.com> References: <20240213145542.23207-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790796302190680979 X-GMAIL-MSGID: 1790796302190680979 |
Series |
Add power-supply properties for sdmmc nodes on Microchip boards
|
|
Commit Message
Mihai Sain
Feb. 13, 2024, 2:55 p.m. UTC
In order to avoid the issues from the tuning procedure required by
the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode.
Add vmmc-supply and vqmmc-supply properties to sdmmc0 node.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
---
arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts index 15239834d886..7b36e1970bb7 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -199,6 +199,8 @@ &sdmmc0 { bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; + vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&vdd_3v3>; status = "okay"; };