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[v2,02/12] spi: s3c64xx: define a magic value

Message ID	20240212140331.915498-3-tudor.ambarus@linaro.org
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel+bounces-61788-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; From: Tudor Ambarus <tudor.ambarus@linaro.org> To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org, krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, devicetree@vger.kernel.org, arnd@arndb.de, Tudor Ambarus <tudor.ambarus@linaro.org> Subject: [PATCH v2 02/12] spi: s3c64xx: define a magic value Date: Mon, 12 Feb 2024 14:03:21 +0000 Message-ID: <20240212140331.915498-3-tudor.ambarus@linaro.org> In-Reply-To: <20240212140331.915498-1-tudor.ambarus@linaro.org> References: <20240212140331.915498-1-tudor.ambarus@linaro.org> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX
Series	spi: s3c64xx: remove OF alias ID dependency \| [v2,00/12] spi: s3c64xx: remove OF alias ID dependency [v2,01/12] spi: dt-bindings: introduce FIFO depth properties [v2,02/12] spi: s3c64xx: define a magic value [v2,03/12] spi: s3c64xx: allow full FIFO masks [v2,04/12] spi: s3c64xx: determine the fifo depth only once [v2,05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree [v2,06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible [v2,07/12] spi: s3c64xx: let the SPI core determine the bus number [v2,08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() [v2,09/12] spi: s3c64xx: get rid of the OF alias ID dependency [v2,10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id [v2,11/12] spi: s3c64xx: switch gs101 to new port config data [v2,12/12] spi: s3c64xx: switch exynos850 to new port config data

Commit Message

Tudor Ambarus Feb. 12, 2024, 2:03 p.m. UTC

  Define a magic value, it will be used in the next patch as well.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 drivers/spi/spi-s3c64xx.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

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Patch

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 6f29dca68491..6ff3b25b6feb 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -78,6 +78,7 @@ 
 #define S3C64XX_SPI_INT_RX_FIFORDY_EN		(1<<1)
 #define S3C64XX_SPI_INT_TX_FIFORDY_EN		(1<<0)
 
+#define S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT	6
 #define S3C64XX_SPI_ST_RX_OVERRUN_ERR		(1<<5)
 #define S3C64XX_SPI_ST_RX_UNDERRUN_ERR		(1<<4)
 #define S3C64XX_SPI_ST_TX_OVERRUN_ERR		(1<<3)
@@ -108,7 +109,8 @@ 
 #define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
 #define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & \
 				(1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
-#define TX_FIFO_LVL(v, i) (((v) >> 6) & FIFO_LVL_MASK(i))
+#define TX_FIFO_LVL(v, i) (((v) >> S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT) &	\
+			   FIFO_LVL_MASK(i))
 #define RX_FIFO_LVL(v, i) (((v) >> (i)->port_conf->rx_lvl_offset) & \
 					FIFO_LVL_MASK(i))
 #define FIFO_DEPTH(i) ((FIFO_LVL_MASK(i) >> 1) + 1)