[15/17] arm64: dts: renesas: r9a07g054: Update #power-domain-cells = <1>

Message ID 20240208124300.2740313-16-claudiu.beznea.uj@bp.renesas.com
State New
Headers
Series clk: renesas: rzg2l: Add support for power domains |

Commit Message

claudiu beznea Feb. 8, 2024, 12:42 p.m. UTC
  From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Update CPG #power-domain-cells = <1> and move all the IPs to be part of the
always on power domain as the driver has been modified to support multiple
power domains.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 100 ++++++++++-----------
 1 file changed, 50 insertions(+), 50 deletions(-)
  

Comments

Geert Uytterhoeven Feb. 16, 2024, 2:11 p.m. UTC | #1
On Thu, Feb 8, 2024 at 1:44 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Update CPG #power-domain-cells = <1> and move all the IPs to be part of the
> always on power domain as the driver has been modified to support multiple
> power domains.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

> --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
> @@ -238,7 +238,7 @@ mtu3: timer@10001200 {
>                                           "tgia8", "tgib8", "tgic8", "tgid8",
>                                           "tciv8", "tciu8";
>                         clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
> -                       power-domains = <&cpg>;
> +                       power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;

This should be R9A07G054_PD_MTU, but that domain is not yet supported
by the driver.  Instead of adding incorrect hardware descriptions,
I'd rather defer this until all domains are handled by the driver.

>                         resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
>                         #pwm-cells = <2>;
>                         status = "disabled";

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
  

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 1f1d481dc783..15fc6e6f79ce 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -238,7 +238,7 @@  mtu3: timer@10001200 {
 					  "tgia8", "tgib8", "tgic8", "tgid8",
 					  "tciv8", "tciu8";
 			clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
 			#pwm-cells = <2>;
 			status = "disabled";
@@ -259,7 +259,7 @@  ssi0: ssi@10049c00 {
 			resets = <&cpg R9A07G054_SSI0_RST_M2_REG>;
 			dmas = <&dmac 0x2655>, <&dmac 0x2656>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -279,7 +279,7 @@  ssi1: ssi@1004a000 {
 			resets = <&cpg R9A07G054_SSI1_RST_M2_REG>;
 			dmas = <&dmac 0x2659>, <&dmac 0x265a>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -298,7 +298,7 @@  ssi2: ssi@1004a400 {
 			resets = <&cpg R9A07G054_SSI2_RST_M2_REG>;
 			dmas = <&dmac 0x265f>;
 			dma-names = "rt";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -318,7 +318,7 @@  ssi3: ssi@1004a800 {
 			resets = <&cpg R9A07G054_SSI3_RST_M2_REG>;
 			dmas = <&dmac 0x2661>, <&dmac 0x2662>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -334,7 +334,7 @@  spi0: spi@1004ac00 {
 			resets = <&cpg R9A07G054_RSPI0_RST>;
 			dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -352,7 +352,7 @@  spi1: spi@1004b000 {
 			resets = <&cpg R9A07G054_RSPI1_RST>;
 			dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -370,7 +370,7 @@  spi2: spi@1004b400 {
 			resets = <&cpg R9A07G054_RSPI2_RST>;
 			dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -391,7 +391,7 @@  scif0: serial@1004b800 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCIF0_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCIF0_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -410,7 +410,7 @@  scif1: serial@1004bc00 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCIF1_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCIF1_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -429,7 +429,7 @@  scif2: serial@1004c000 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCIF2_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCIF2_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -448,7 +448,7 @@  scif3: serial@1004c400 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCIF3_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCIF3_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -467,7 +467,7 @@  scif4: serial@1004c800 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCIF4_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCIF4_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -482,7 +482,7 @@  sci0: serial@1004d000 {
 			interrupt-names = "eri", "rxi", "txi", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCI0_CLKP>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCI0_RST>;
 			status = "disabled";
 		};
@@ -497,7 +497,7 @@  sci1: serial@1004d400 {
 			interrupt-names = "eri", "rxi", "txi", "tei";
 			clocks = <&cpg CPG_MOD R9A07G054_SCI1_CLKP>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_SCI1_RST>;
 			status = "disabled";
 		};
@@ -525,7 +525,7 @@  canfd: can@10050000 {
 			resets = <&cpg R9A07G054_CANFD_RSTP_N>,
 				 <&cpg R9A07G054_CANFD_RSTC_N>;
 			reset-names = "rstp_n", "rstc_n";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			channel0 {
@@ -554,7 +554,7 @@  i2c0: i2c@10058000 {
 			clocks = <&cpg CPG_MOD R9A07G054_I2C0_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G054_I2C0_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -576,7 +576,7 @@  i2c1: i2c@10058400 {
 			clocks = <&cpg CPG_MOD R9A07G054_I2C1_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G054_I2C1_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -598,7 +598,7 @@  i2c2: i2c@10058800 {
 			clocks = <&cpg CPG_MOD R9A07G054_I2C2_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G054_I2C2_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -620,7 +620,7 @@  i2c3: i2c@10058c00 {
 			clocks = <&cpg CPG_MOD R9A07G054_I2C3_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G054_I2C3_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -634,7 +634,7 @@  adc: adc@10059000 {
 			resets = <&cpg R9A07G054_ADC_PRESETN>,
 				 <&cpg R9A07G054_ADC_ADRST_N>;
 			reset-names = "presetn", "adrst-n";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			#address-cells = <1>;
@@ -672,7 +672,7 @@  tsu: thermal@10059400 {
 			reg = <0 0x10059400 0 0x400>;
 			clocks = <&cpg CPG_MOD R9A07G054_TSU_PCLK>;
 			resets = <&cpg R9A07G054_TSU_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#thermal-sensor-cells = <1>;
 		};
 
@@ -687,7 +687,7 @@  sbc: spi@10060000 {
 			clocks = <&cpg CPG_MOD R9A07G054_SPI_CLK2>,
 				 <&cpg CPG_MOD R9A07G054_SPI_CLK>;
 			resets = <&cpg R9A07G054_SPI_RST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -707,7 +707,7 @@  cru: video@10830000 {
 			resets = <&cpg R9A07G054_CRU_PRESETN>,
 				 <&cpg R9A07G054_CRU_ARESETN>;
 			reset-names = "presetn", "aresetn";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			ports {
@@ -748,7 +748,7 @@  csi2: csi2@10830400 {
 			resets = <&cpg R9A07G054_CRU_PRESETN>,
 				 <&cpg R9A07G054_CRU_CMN_RSTB>;
 			reset-names = "presetn", "cmn-rstb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			ports {
@@ -796,7 +796,7 @@  dsi: dsi@10850000 {
 				 <&cpg R9A07G054_MIPI_DSI_ARESET_N>,
 				 <&cpg R9A07G054_MIPI_DSI_PRESET_N>;
 			reset-names = "rst", "arst", "prst";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -809,7 +809,7 @@  vspd: vsp@10870000 {
 				 <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>,
 				 <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>;
 			clock-names = "aclk", "pclk", "vclk";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_LCDC_RESET_N>;
 			renesas,fcp = <&fcpvd>;
 		};
@@ -822,7 +822,7 @@  fcpvd: fcp@10880000 {
 				 <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>,
 				 <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>;
 			clock-names = "aclk", "pclk", "vclk";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_LCDC_RESET_N>;
 		};
 
@@ -833,7 +833,7 @@  cpg: clock-controller@11010000 {
 			clock-names = "extal";
 			#clock-cells = <2>;
 			#reset-cells = <1>;
-			#power-domain-cells = <0>;
+			#power-domain-cells = <1>;
 		};
 
 		sysc: system-controller@11020000 {
@@ -859,7 +859,7 @@  pinctrl: pinctrl@11030000 {
 			interrupt-controller;
 			gpio-ranges = <&pinctrl 0 0 392>;
 			clocks = <&cpg CPG_MOD R9A07G054_GPIO_HCLK>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_GPIO_RSTN>,
 				 <&cpg R9A07G054_GPIO_PORT_RESETN>,
 				 <&cpg R9A07G054_GPIO_SPARE_RESETN>;
@@ -916,7 +916,7 @@  irqc: interrupt-controller@110a0000 {
 			clocks = <&cpg CPG_MOD R9A07G054_IA55_CLK>,
 				 <&cpg CPG_MOD R9A07G054_IA55_PCLK>;
 			clock-names = "clk", "pclk";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_IA55_RESETN>;
 		};
 
@@ -950,7 +950,7 @@  dmac: dma-controller@11820000 {
 			clocks = <&cpg CPG_MOD R9A07G054_DMAC_ACLK>,
 				 <&cpg CPG_MOD R9A07G054_DMAC_PCLK>;
 			clock-names = "main", "register";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_DMAC_ARESETN>,
 				 <&cpg R9A07G054_DMAC_RST_ASYNC>;
 			reset-names = "arst", "rst_async";
@@ -971,7 +971,7 @@  gpu: gpu@11840000 {
 				 <&cpg CPG_MOD R9A07G054_GPU_AXI_CLK>,
 				 <&cpg CPG_MOD R9A07G054_GPU_ACE_CLK>;
 			clock-names = "gpu", "bus", "bus_ace";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G054_GPU_RESETN>,
 				 <&cpg R9A07G054_GPU_AXI_RESETN>,
 				 <&cpg R9A07G054_GPU_ACE_RESETN>;
@@ -1001,7 +1001,7 @@  sdhi0: mmc@11c00000 {
 				 <&cpg CPG_MOD R9A07G054_SDHI0_ACLK>;
 			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G054_SDHI0_IXRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1017,7 +1017,7 @@  sdhi1: mmc@11c10000 {
 				 <&cpg CPG_MOD R9A07G054_SDHI1_ACLK>;
 			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G054_SDHI1_IXRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1035,7 +1035,7 @@  eth0: ethernet@11c20000 {
 				 <&cpg CPG_CORE R9A07G054_CLK_HP>;
 			clock-names = "axi", "chi", "refclk";
 			resets = <&cpg R9A07G054_ETH0_RST_HW_N>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -1055,7 +1055,7 @@  eth1: ethernet@11c30000 {
 				 <&cpg CPG_CORE R9A07G054_CLK_HP>;
 			clock-names = "axi", "chi", "refclk";
 			resets = <&cpg R9A07G054_ETH1_RST_HW_N>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -1067,7 +1067,7 @@  phyrst: usbphy-ctrl@11c40000 {
 			reg = <0 0x11c40000 0 0x10000>;
 			clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>;
 			resets = <&cpg R9A07G054_USB_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			#reset-cells = <1>;
 			status = "disabled";
 		};
@@ -1082,7 +1082,7 @@  ohci0: usb@11c50000 {
 				 <&cpg R9A07G054_USB_U2H0_HRESETN>;
 			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1096,7 +1096,7 @@  ohci1: usb@11c70000 {
 				 <&cpg R9A07G054_USB_U2H1_HRESETN>;
 			phys = <&usb2_phy1 1>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1111,7 +1111,7 @@  ehci0: usb@11c50100 {
 			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1126,7 +1126,7 @@  ehci1: usb@11c70100 {
 			phys = <&usb2_phy1 2>;
 			phy-names = "usb";
 			companion = <&ohci1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1139,7 +1139,7 @@  usb2_phy0: usb-phy@11c50200 {
 				 <&cpg CPG_MOD R9A07G054_USB_U2H0_HCLK>;
 			resets = <&phyrst 0>;
 			#phy-cells = <1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1152,7 +1152,7 @@  usb2_phy1: usb-phy@11c70200 {
 				 <&cpg CPG_MOD R9A07G054_USB_U2H1_HCLK>;
 			resets = <&phyrst 1>;
 			#phy-cells = <1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1171,7 +1171,7 @@  hsusb: usb@11c60000 {
 			renesas,buswait = <7>;
 			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1186,7 +1186,7 @@  wdt0: watchdog@12800800 {
 				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "wdt", "perrout";
 			resets = <&cpg R9A07G054_WDT0_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1201,7 +1201,7 @@  wdt1: watchdog@12800c00 {
 				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "wdt", "perrout";
 			resets = <&cpg R9A07G054_WDT1_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1212,7 +1212,7 @@  ostm0: timer@12801000 {
 			interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G054_OSTM0_PCLK>;
 			resets = <&cpg R9A07G054_OSTM0_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1223,7 +1223,7 @@  ostm1: timer@12801400 {
 			interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G054_OSTM1_PCLK>;
 			resets = <&cpg R9A07G054_OSTM1_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -1234,7 +1234,7 @@  ostm2: timer@12801800 {
 			interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G054_OSTM2_PCLK>;
 			resets = <&cpg R9A07G054_OSTM2_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G054_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 	};