diff mbox series

[13/17] arm64: dts: renesas: r9a07g043: Update #power-domain-cells = <1>

Message ID 20240208124300.2740313-14-claudiu.beznea.uj@bp.renesas.com
State New
Headers
Series clk: renesas: rzg2l: Add support for power domains |

Commit Message

claudiu beznea Feb. 8, 2024, 12:42 p.m. UTC 
  From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Update CPG #power-domain-cells = <1> and move all the IPs to be part of the
always on power domain as the driver has been modified to support multiple
power domains.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi  | 84 ++++++++++-----------
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi |  6 +-
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi |  2 +-
 3 files changed, 46 insertions(+), 46 deletions(-)

Comments

Geert Uytterhoeven Feb. 16, 2024, 2:11 p.m. UTC | #1 
Hi Claudiu,

On Thu, Feb 8, 2024 at 1:44 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Update CPG #power-domain-cells = <1> and move all the IPs to be part of the
> always on power domain as the driver has been modified to support multiple
> power domains.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -138,7 +138,7 @@ mtu3: timer@10001200 {
>                                           "tgia8", "tgib8", "tgic8", "tgid8",
>                                           "tciv8", "tciu8";
>                         clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;
> -                       power-domains = <&cpg>;
> +                       power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;

This should be R9A07G043_PD_MTU, but that domain is not yet supported
by the driver.  Instead of adding incorrect hardware descriptions,
I'd rather defer this until all domains are handled by the driver.

>                         resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;
>                         #pwm-cells = <2>;
>                         status = "disabled";

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 8721f4c9fa0f..3e12f9dd3c6a 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -138,7 +138,7 @@  mtu3: timer@10001200 {
 					  "tgia8", "tgib8", "tgic8", "tgid8",
 					  "tciv8", "tciu8";
 			clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;
 			#pwm-cells = <2>;
 			status = "disabled";
@@ -159,7 +159,7 @@  ssi0: ssi@10049c00 {
 			resets = <&cpg R9A07G043_SSI0_RST_M2_REG>;
 			dmas = <&dmac 0x2655>, <&dmac 0x2656>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -179,7 +179,7 @@  ssi1: ssi@1004a000 {
 			resets = <&cpg R9A07G043_SSI1_RST_M2_REG>;
 			dmas = <&dmac 0x2659>, <&dmac 0x265a>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -198,7 +198,7 @@  ssi2: ssi@1004a400 {
 			resets = <&cpg R9A07G043_SSI2_RST_M2_REG>;
 			dmas = <&dmac 0x265f>;
 			dma-names = "rt";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -218,7 +218,7 @@  ssi3: ssi@1004a800 {
 			resets = <&cpg R9A07G043_SSI3_RST_M2_REG>;
 			dmas = <&dmac 0x2661>, <&dmac 0x2662>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#sound-dai-cells = <0>;
 			status = "disabled";
 		};
@@ -234,7 +234,7 @@  spi0: spi@1004ac00 {
 			resets = <&cpg R9A07G043_RSPI0_RST>;
 			dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -252,7 +252,7 @@  spi1: spi@1004b000 {
 			resets = <&cpg R9A07G043_RSPI1_RST>;
 			dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -270,7 +270,7 @@  spi2: spi@1004b400 {
 			resets = <&cpg R9A07G043_RSPI2_RST>;
 			dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
 			dma-names = "tx", "rx";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -291,7 +291,7 @@  scif0: serial@1004b800 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -310,7 +310,7 @@  scif1: serial@1004bc00 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCIF1_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCIF1_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -329,7 +329,7 @@  scif2: serial@1004c000 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCIF2_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCIF2_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -348,7 +348,7 @@  scif3: serial@1004c400 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCIF3_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCIF3_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -367,7 +367,7 @@  scif4: serial@1004c800 {
 					  "bri", "dri", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCIF4_CLK_PCK>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCIF4_RST_SYSTEM_N>;
 			status = "disabled";
 		};
@@ -382,7 +382,7 @@  sci0: serial@1004d000 {
 			interrupt-names = "eri", "rxi", "txi", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCI0_CLKP>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCI0_RST>;
 			status = "disabled";
 		};
@@ -397,7 +397,7 @@  sci1: serial@1004d400 {
 			interrupt-names = "eri", "rxi", "txi", "tei";
 			clocks = <&cpg CPG_MOD R9A07G043_SCI1_CLKP>;
 			clock-names = "fck";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_SCI1_RST>;
 			status = "disabled";
 		};
@@ -425,7 +425,7 @@  canfd: can@10050000 {
 			resets = <&cpg R9A07G043_CANFD_RSTP_N>,
 				 <&cpg R9A07G043_CANFD_RSTC_N>;
 			reset-names = "rstp_n", "rstc_n";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			channel0 {
@@ -454,7 +454,7 @@  i2c0: i2c@10058000 {
 			clocks = <&cpg CPG_MOD R9A07G043_I2C0_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G043_I2C0_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -476,7 +476,7 @@  i2c1: i2c@10058400 {
 			clocks = <&cpg CPG_MOD R9A07G043_I2C1_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G043_I2C1_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -498,7 +498,7 @@  i2c2: i2c@10058800 {
 			clocks = <&cpg CPG_MOD R9A07G043_I2C2_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G043_I2C2_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -520,7 +520,7 @@  i2c3: i2c@10058c00 {
 			clocks = <&cpg CPG_MOD R9A07G043_I2C3_PCLK>;
 			clock-frequency = <100000>;
 			resets = <&cpg R9A07G043_I2C3_MRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -534,7 +534,7 @@  adc: adc@10059000 {
 			resets = <&cpg R9A07G043_ADC_PRESETN>,
 				 <&cpg R9A07G043_ADC_ADRST_N>;
 			reset-names = "presetn", "adrst-n";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 
 			#address-cells = <1>;
@@ -554,7 +554,7 @@  tsu: thermal@10059400 {
 			reg = <0 0x10059400 0 0x400>;
 			clocks = <&cpg CPG_MOD R9A07G043_TSU_PCLK>;
 			resets = <&cpg R9A07G043_TSU_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#thermal-sensor-cells = <1>;
 		};
 
@@ -568,7 +568,7 @@  sbc: spi@10060000 {
 			clocks = <&cpg CPG_MOD R9A07G043_SPI_CLK2>,
 				 <&cpg CPG_MOD R9A07G043_SPI_CLK>;
 			resets = <&cpg R9A07G043_SPI_RST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -581,7 +581,7 @@  cpg: clock-controller@11010000 {
 			clock-names = "extal";
 			#clock-cells = <2>;
 			#reset-cells = <1>;
-			#power-domain-cells = <0>;
+			#power-domain-cells = <1>;
 		};
 
 		sysc: system-controller@11020000 {
@@ -599,7 +599,7 @@  pinctrl: pinctrl@11030000 {
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_GPIO_RSTN>,
 				 <&cpg R9A07G043_GPIO_PORT_RESETN>,
 				 <&cpg R9A07G043_GPIO_SPARE_RESETN>;
@@ -635,7 +635,7 @@  dmac: dma-controller@11820000 {
 			clocks = <&cpg CPG_MOD R9A07G043_DMAC_ACLK>,
 				 <&cpg CPG_MOD R9A07G043_DMAC_PCLK>;
 			clock-names = "main", "register";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			resets = <&cpg R9A07G043_DMAC_ARESETN>,
 				 <&cpg R9A07G043_DMAC_RST_ASYNC>;
 			reset-names = "arst", "rst_async";
@@ -655,7 +655,7 @@  sdhi0: mmc@11c00000 {
 				 <&cpg CPG_MOD R9A07G043_SDHI0_ACLK>;
 			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G043_SDHI0_IXRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -671,7 +671,7 @@  sdhi1: mmc@11c10000 {
 				 <&cpg CPG_MOD R9A07G043_SDHI1_ACLK>;
 			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G043_SDHI1_IXRST>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -689,7 +689,7 @@  eth0: ethernet@11c20000 {
 				 <&cpg CPG_CORE R9A07G043_CLK_HP>;
 			clock-names = "axi", "chi", "refclk";
 			resets = <&cpg R9A07G043_ETH0_RST_HW_N>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -709,7 +709,7 @@  eth1: ethernet@11c30000 {
 				 <&cpg CPG_CORE R9A07G043_CLK_HP>;
 			clock-names = "axi", "chi", "refclk";
 			resets = <&cpg R9A07G043_ETH1_RST_HW_N>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -721,7 +721,7 @@  phyrst: usbphy-ctrl@11c40000 {
 			reg = <0 0x11c40000 0 0x10000>;
 			clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>;
 			resets = <&cpg R9A07G043_USB_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			#reset-cells = <1>;
 			status = "disabled";
 		};
@@ -736,7 +736,7 @@  ohci0: usb@11c50000 {
 				 <&cpg R9A07G043_USB_U2H0_HRESETN>;
 			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -750,7 +750,7 @@  ohci1: usb@11c70000 {
 				 <&cpg R9A07G043_USB_U2H1_HRESETN>;
 			phys = <&usb2_phy1 1>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -765,7 +765,7 @@  ehci0: usb@11c50100 {
 			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -780,7 +780,7 @@  ehci1: usb@11c70100 {
 			phys = <&usb2_phy1 2>;
 			phy-names = "usb";
 			companion = <&ohci1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -793,7 +793,7 @@  usb2_phy0: usb-phy@11c50200 {
 				 <&cpg CPG_MOD R9A07G043_USB_U2H0_HCLK>;
 			resets = <&phyrst 0>;
 			#phy-cells = <1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -806,7 +806,7 @@  usb2_phy1: usb-phy@11c70200 {
 				 <&cpg CPG_MOD R9A07G043_USB_U2H1_HCLK>;
 			resets = <&phyrst 1>;
 			#phy-cells = <1>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -825,7 +825,7 @@  hsusb: usb@11c60000 {
 			renesas,buswait = <7>;
 			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -840,7 +840,7 @@  wdt0: watchdog@12800800 {
 				     <SOC_PERIPHERAL_IRQ(50) IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "wdt", "perrout";
 			resets = <&cpg R9A07G043_WDT0_PRESETN>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -851,7 +851,7 @@  ostm0: timer@12801000 {
 			interrupts = <SOC_PERIPHERAL_IRQ(46) IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>;
 			resets = <&cpg R9A07G043_OSTM0_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -862,7 +862,7 @@  ostm1: timer@12801400 {
 			interrupts = <SOC_PERIPHERAL_IRQ(47) IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>;
 			resets = <&cpg R9A07G043_OSTM1_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 
@@ -873,7 +873,7 @@  ostm2: timer@12801800 {
 			interrupts = <SOC_PERIPHERAL_IRQ(48) IRQ_TYPE_EDGE_RISING>;
 			clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
 			resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
-			power-domains = <&cpg>;
+			power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 			status = "disabled";
 		};
 	};
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index 01d08ebb4a78..1ac71b9cbbb6 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -75,7 +75,7 @@  cru: video@10830000 {
 		resets = <&cpg R9A07G043_CRU_PRESETN>,
 			 <&cpg R9A07G043_CRU_ARESETN>;
 		reset-names = "presetn", "aresetn";
-		power-domains = <&cpg>;
+		power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 		status = "disabled";
 
 		ports {
@@ -106,7 +106,7 @@  csi2: csi2@10830400 {
 		resets = <&cpg R9A07G043_CRU_PRESETN>,
 			 <&cpg R9A07G043_CRU_CMN_RSTB>;
 		reset-names = "presetn", "cmn-rstb";
-		power-domains = <&cpg>;
+		power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 		status = "disabled";
 
 		ports {
@@ -194,7 +194,7 @@  irqc: interrupt-controller@110a0000 {
 		clocks = <&cpg CPG_MOD R9A07G043_IA55_CLK>,
 			<&cpg CPG_MOD R9A07G043_IA55_PCLK>;
 		clock-names = "clk", "pclk";
-		power-domains = <&cpg>;
+		power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 		resets = <&cpg R9A07G043_IA55_RESETN>;
 	};
 
diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
index 09ef10b39f46..925203746b28 100644
--- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
+++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
@@ -62,7 +62,7 @@  plic: interrupt-controller@12c00000 {
 		interrupt-controller;
 		reg = <0x0 0x12c00000 0 0x400000>;
 		clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
-		power-domains = <&cpg>;
+		power-domains = <&cpg R9A07G043_PD_ALWAYS_ON>;
 		resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
 		interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
 	};