Message ID | 20240208123233.391115-3-vaishnav.a@ti.com |
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State | New |
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([10.24.69.142]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 418CWY1J074789; Thu, 8 Feb 2024 06:32:43 -0600 From: Vaishnav Achath <vaishnav.a@ti.com> To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org> CC: <kernel@pengutronix.de>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <vaishnav.a@ti.com>, <u-kumar1@ti.com>, <j-choudhary@ti.com>, <j-luthra@ti.com>, <afd@ti.com> Subject: [PATCH v3 2/9] arm64: dts: ti: k3-j784s4-evm: Enable camera peripherals Date: Thu, 8 Feb 2024 18:02:26 +0530 Message-ID: <20240208123233.391115-3-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240208123233.391115-1-vaishnav.a@ti.com> References: <20240208123233.391115-1-vaishnav.a@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790334072426614017 X-GMAIL-MSGID: 1790334072426614017 |
Series |
Add CSI2RX capture support on TI J7 platforms
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Commit Message
Vaishnav Achath
Feb. 8, 2024, 12:32 p.m. UTC
CSI cameras are controlled using I2C. On J784S4 EVM, this is routed to I2C-5, so enable the instance and the TCA6408 GPIO expander on the bus. J784S4 EVM schematics: https://www.ti.com/lit/zip/sprr458 Reviewed-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> --- V1->V2: Update commit message with schematics. arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 57e7cb8ea2b8..bb2558b68381 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -297,6 +297,13 @@ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */ >; }; + main_i2c5_pins_default: main-i2c5-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */ + J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */ + >; + }; + main_mmc1_pins_default: main-mmc1-default-pins { bootph-all; pinctrl-single,pins = < @@ -761,6 +768,24 @@ exp2: gpio@22 { }; }; +&main_i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c5_pins_default>; + clock-frequency = <400000>; + status = "okay"; + + exp5: gpio@20 { + compatible = "ti,tca6408"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0", + "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO3", + "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2", + "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4"; + }; +}; + &main_sdhci0 { bootph-all; /* eMMC */