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[147.75.80.249]) by mx.google.com with ESMTPS id h2-20020a0564020e8200b005610b0486c3si451790eda.490.2024.02.08.01.23.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Feb 2024 01:23:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-57723-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=ltts.com dmarc=pass fromdomain=ltts.com); spf=pass (google.com: domain of linux-kernel+bounces-57723-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57723-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ltts.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 8AC901F25DAA for ; Thu, 8 Feb 2024 09:23:52 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6203E71B2D; Thu, 8 Feb 2024 09:21:20 +0000 (UTC) Received: from esa1.ltts.com (unknown [118.185.121.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8595871B2E for ; Thu, 8 Feb 2024 09:21:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=118.185.121.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707384078; cv=none; b=gkEuFHH71/EtWdIQxz1Khyewzypvl1ooQaVlXTHDU8/OCTuJ/GGPrTVmCIpOlLa03fS38e4RkQQLBrc4Lqv5aIh6oUm0P5We4/MWG8XiGaTDaLTGTCFZfop4Es35bkCSMxhtKlYJgDRdA7UJ+DQOaip3tXYXC5iZnK4jPWKcymU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707384078; c=relaxed/simple; bh=IxGn927BGFRmm/ygF3LwDNCQJWTN1CLV232sRxge5WA=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=IbPs0tJ9ORk4kzUxdX7i+y1KD2rxTbti5m3Hun6/IZH7qnzEV68fTfMjFWOq8dA58gzp4rojT2aHXgrZwJXdsSOGno+1HJbmAcUlJlzcmXSchsI5YlVqlujU+I38DddykXe8t37CXzvoH+782q6tDPkyCAHTlk/Bo+htSXu+oJM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ltts.com; spf=pass smtp.mailfrom=ltts.com; arc=none smtp.client-ip=118.185.121.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ltts.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ltts.com IronPort-SDR: ZptpJZB3dT5gG2aZDWswoarET+vMrDeAQBMKGpArwB3J4skc/xQJUYA3yqnS03EvLXq34mEZIZ agylEM+s9DYw== Received: from unknown (HELO localhost.localdomain) ([192.168.34.55]) by esa1.ltts.com with ESMTP; 08 Feb 2024 14:51:13 +0530 From: Bhargav Raviprakash To: linux-kernel@vger.kernel.org Cc: m.nirmaladevi@ltts.com, arnd@arndb.de, gregkh@linuxfoundation.org, Bhargav Raviprakash Subject: [PATCH v1 07/13] misc: tps6594-pfsm: Add TI TPS65224 PMIC PFSM Date: Thu, 8 Feb 2024 14:50:56 +0530 Message-Id: <20240208092059.1207134-1-bhargav.r@ltts.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790322129822444985 X-GMAIL-MSGID: 1790322129822444985 Add support for TPS65224 PFSM in the TPS6594 PFSM driver as they share significant functionality. Signed-off-by: Bhargav Raviprakash --- drivers/misc/tps6594-pfsm.c | 55 +++++++++++++++++++++++++++---------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/drivers/misc/tps6594-pfsm.c b/drivers/misc/tps6594-pfsm.c index 88dcac814..4fa071093 100644 --- a/drivers/misc/tps6594-pfsm.c +++ b/drivers/misc/tps6594-pfsm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * PFSM (Pre-configurable Finite State Machine) driver for TI TPS6594/TPS6593/LP8764 PMICs + * PFSM (Pre-configurable Finite State Machine) driver for TI TPS65224/TPS6594/TPS6593/LP8764 PMICs * * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ */ @@ -34,15 +34,17 @@ #define TPS6594_FILE_TO_PFSM(f) container_of((f)->private_data, struct tps6594_pfsm, miscdev) -/** +/* * struct tps6594_pfsm - device private data structure * * @miscdev: misc device infos * @regmap: regmap for accessing the device registers + * @chip_id: chip identifier of the device */ struct tps6594_pfsm { struct miscdevice miscdev; struct regmap *regmap; + unsigned long chip_id; }; static ssize_t tps6594_pfsm_read(struct file *f, char __user *buf, @@ -133,21 +135,29 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a struct tps6594_pfsm *pfsm = TPS6594_FILE_TO_PFSM(f); struct pmic_state_opt state_opt; void __user *argp = (void __user *)arg; + unsigned int regmap_reg, mask; int ret = -ENOIOCTLCMD; switch (cmd) { case PMIC_GOTO_STANDBY: - /* Disable LP mode */ - ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_BIT_LP_STANDBY_SEL); - if (ret) - return ret; + /* Disable LP mode on TPS6594 Family PMIC */ + if (pfsm->chip_id != TPS65224) { + ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, + TPS6594_BIT_LP_STANDBY_SEL); + + if (ret) + return ret; + } /* Force trigger */ ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_FSM_I2C_TRIGGERS, TPS6594_BIT_TRIGGER_I2C(0), TPS6594_BIT_TRIGGER_I2C(0)); break; case PMIC_GOTO_LP_STANDBY: + /* TPS65224 does not support LP STANDBY */ + if (pfsm->chip_id == TPS65224) + return ret; + /* Enable LP mode */ ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, TPS6594_BIT_LP_STANDBY_SEL); @@ -169,6 +179,10 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a TPS6594_BIT_NSLEEP1B | TPS6594_BIT_NSLEEP2B); break; case PMIC_SET_MCU_ONLY_STATE: + /* TPS65224 does not support MCU_ONLY_STATE */ + if (pfsm->chip_id == TPS65224) + return ret; + if (copy_from_user(&state_opt, argp, sizeof(state_opt))) return -EFAULT; @@ -192,14 +206,20 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a return -EFAULT; /* Configure wake-up destination */ + if (pfsm->chip_id == TPS65224) { + regmap_reg = TPS65224_REG_STARTUP_CTRL; + mask = TPS65224_MASK_STARTUP_DEST; + } else { + regmap_reg = TPS6594_REG_RTC_CTRL_2; + mask = TPS6594_MASK_STARTUP_DEST; + } + if (state_opt.mcu_only_startup_dest) - ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_MASK_STARTUP_DEST, - TPS6594_STARTUP_DEST_MCU_ONLY); + ret = regmap_write_bits(pfsm->regmap, regmap_reg, + mask, TPS6594_STARTUP_DEST_MCU_ONLY); else - ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, - TPS6594_MASK_STARTUP_DEST, - TPS6594_STARTUP_DEST_ACTIVE); + ret = regmap_write_bits(pfsm->regmap, regmap_reg, + mask, TPS6594_STARTUP_DEST_ACTIVE); if (ret) return ret; @@ -210,8 +230,12 @@ static long tps6594_pfsm_ioctl(struct file *f, unsigned int cmd, unsigned long a return ret; /* Modify NSLEEP1-2 bits */ - ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, - TPS6594_BIT_NSLEEP2B); + if (pfsm->chip_id == TPS65224) + ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, + TPS6594_BIT_NSLEEP1B); + else + ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, + TPS6594_BIT_NSLEEP2B); break; } @@ -262,6 +286,7 @@ static int tps6594_pfsm_probe(struct platform_device *pdev) tps->chip_id, tps->reg); pfsm->miscdev.fops = &tps6594_pfsm_fops; pfsm->miscdev.parent = dev->parent; + pfsm->chip_id = tps->chip_id; for (i = 0 ; i < pdev->num_resources ; i++) { irq = platform_get_irq_byname(pdev, pdev->resource[i].name);