Message ID | 20240207143951.938144-1-christophe.kerello@foss.st.com |
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State | New |
Headers |
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Wed, 7 Feb 2024 15:40:02 +0100 (CET) Received: from localhost (10.201.22.200) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 7 Feb 2024 15:40:02 +0100 From: Christophe Kerello <christophe.kerello@foss.st.com> To: <ulf.hansson@linaro.org>, <alexandre.torgue@foss.st.com>, <yann.gautier@foss.st.com>, <linus.walleij@linaro.org> CC: <linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, Christophe Kerello <christophe.kerello@foss.st.com> Subject: [PATCH] mmc: mmci: stm32: fix DMA API overlapping mappings warning Date: Wed, 7 Feb 2024 15:39:51 +0100 Message-ID: <20240207143951.938144-1-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-07_06,2024-01-31_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790251476277488753 X-GMAIL-MSGID: 1790251476277488753 |
Series |
mmc: mmci: stm32: fix DMA API overlapping mappings warning
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Commit Message
Christophe Kerello
Feb. 7, 2024, 2:39 p.m. UTC
Turning on CONFIG_DMA_API_DEBUG_SG results in the following warning:
DMA-API: mmci-pl18x 48220000.mmc: cacheline tracking EEXIST,
overlapping mappings aren't supported
WARNING: CPU: 1 PID: 51 at kernel/dma/debug.c:568
add_dma_entry+0x234/0x2f4
Modules linked in:
CPU: 1 PID: 51 Comm: kworker/1:2 Not tainted 6.1.28 #1
Hardware name: STMicroelectronics STM32MP257F-EV1 Evaluation Board (DT)
Workqueue: events_freezable mmc_rescan
Call trace:
add_dma_entry+0x234/0x2f4
debug_dma_map_sg+0x198/0x350
__dma_map_sg_attrs+0xa0/0x110
dma_map_sg_attrs+0x10/0x2c
sdmmc_idma_prep_data+0x80/0xc0
mmci_prep_data+0x38/0x84
mmci_start_data+0x108/0x2dc
mmci_request+0xe4/0x190
__mmc_start_request+0x68/0x140
mmc_start_request+0x94/0xc0
mmc_wait_for_req+0x70/0x100
mmc_send_tuning+0x108/0x1ac
sdmmc_execute_tuning+0x14c/0x210
mmc_execute_tuning+0x48/0xec
mmc_sd_init_uhs_card.part.0+0x208/0x464
mmc_sd_init_card+0x318/0x89c
mmc_attach_sd+0xe4/0x180
mmc_rescan+0x244/0x320
DMA API debug brings to light leaking dma-mappings as dma_map_sg and
dma_unmap_sg are not correctly balanced.
If an error occurs in mmci_cmd_irq function, only mmci_dma_error
function is called and as this API is not managed on stm32 variant,
dma_unmap_sg is never called in this error path.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
Comments
On Wed, 7 Feb 2024 at 15:40, Christophe Kerello <christophe.kerello@foss.st.com> wrote: > > Turning on CONFIG_DMA_API_DEBUG_SG results in the following warning: > > DMA-API: mmci-pl18x 48220000.mmc: cacheline tracking EEXIST, > overlapping mappings aren't supported > WARNING: CPU: 1 PID: 51 at kernel/dma/debug.c:568 > add_dma_entry+0x234/0x2f4 > Modules linked in: > CPU: 1 PID: 51 Comm: kworker/1:2 Not tainted 6.1.28 #1 > Hardware name: STMicroelectronics STM32MP257F-EV1 Evaluation Board (DT) > Workqueue: events_freezable mmc_rescan > Call trace: > add_dma_entry+0x234/0x2f4 > debug_dma_map_sg+0x198/0x350 > __dma_map_sg_attrs+0xa0/0x110 > dma_map_sg_attrs+0x10/0x2c > sdmmc_idma_prep_data+0x80/0xc0 > mmci_prep_data+0x38/0x84 > mmci_start_data+0x108/0x2dc > mmci_request+0xe4/0x190 > __mmc_start_request+0x68/0x140 > mmc_start_request+0x94/0xc0 > mmc_wait_for_req+0x70/0x100 > mmc_send_tuning+0x108/0x1ac > sdmmc_execute_tuning+0x14c/0x210 > mmc_execute_tuning+0x48/0xec > mmc_sd_init_uhs_card.part.0+0x208/0x464 > mmc_sd_init_card+0x318/0x89c > mmc_attach_sd+0xe4/0x180 > mmc_rescan+0x244/0x320 > > DMA API debug brings to light leaking dma-mappings as dma_map_sg and > dma_unmap_sg are not correctly balanced. > > If an error occurs in mmci_cmd_irq function, only mmci_dma_error > function is called and as this API is not managed on stm32 variant, > dma_unmap_sg is never called in this error path. > > Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Applied for fixes and by adding a fixes- and stable-tag, thanks! Kind regards Uffe > --- > drivers/mmc/host/mmci_stm32_sdmmc.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c > index 35067e1e6cd8..f5da7f9baa52 100644 > --- a/drivers/mmc/host/mmci_stm32_sdmmc.c > +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c > @@ -225,6 +225,8 @@ static int sdmmc_idma_start(struct mmci_host *host, unsigned int *datactrl) > struct scatterlist *sg; > int i; > > + host->dma_in_progress = true; > + > if (!host->variant->dma_lli || data->sg_len == 1 || > idma->use_bounce_buffer) { > u32 dma_addr; > @@ -263,9 +265,30 @@ static int sdmmc_idma_start(struct mmci_host *host, unsigned int *datactrl) > return 0; > } > > +static void sdmmc_idma_error(struct mmci_host *host) > +{ > + struct mmc_data *data = host->data; > + struct sdmmc_idma *idma = host->dma_priv; > + > + if (!dma_inprogress(host)) > + return; > + > + writel_relaxed(0, host->base + MMCI_STM32_IDMACTRLR); > + host->dma_in_progress = false; > + data->host_cookie = 0; > + > + if (!idma->use_bounce_buffer) > + dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, > + mmc_get_dma_dir(data)); > +} > + > static void sdmmc_idma_finalize(struct mmci_host *host, struct mmc_data *data) > { > + if (!dma_inprogress(host)) > + return; > + > writel_relaxed(0, host->base + MMCI_STM32_IDMACTRLR); > + host->dma_in_progress = false; > > if (!data->host_cookie) > sdmmc_idma_unprep_data(host, data, 0); > @@ -676,6 +699,7 @@ static struct mmci_host_ops sdmmc_variant_ops = { > .dma_setup = sdmmc_idma_setup, > .dma_start = sdmmc_idma_start, > .dma_finalize = sdmmc_idma_finalize, > + .dma_error = sdmmc_idma_error, > .set_clkreg = mmci_sdmmc_set_clkreg, > .set_pwrreg = mmci_sdmmc_set_pwrreg, > .busy_complete = sdmmc_busy_complete, > -- > 2.25.1 >
diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c index 35067e1e6cd8..f5da7f9baa52 100644 --- a/drivers/mmc/host/mmci_stm32_sdmmc.c +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c @@ -225,6 +225,8 @@ static int sdmmc_idma_start(struct mmci_host *host, unsigned int *datactrl) struct scatterlist *sg; int i; + host->dma_in_progress = true; + if (!host->variant->dma_lli || data->sg_len == 1 || idma->use_bounce_buffer) { u32 dma_addr; @@ -263,9 +265,30 @@ static int sdmmc_idma_start(struct mmci_host *host, unsigned int *datactrl) return 0; } +static void sdmmc_idma_error(struct mmci_host *host) +{ + struct mmc_data *data = host->data; + struct sdmmc_idma *idma = host->dma_priv; + + if (!dma_inprogress(host)) + return; + + writel_relaxed(0, host->base + MMCI_STM32_IDMACTRLR); + host->dma_in_progress = false; + data->host_cookie = 0; + + if (!idma->use_bounce_buffer) + dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, + mmc_get_dma_dir(data)); +} + static void sdmmc_idma_finalize(struct mmci_host *host, struct mmc_data *data) { + if (!dma_inprogress(host)) + return; + writel_relaxed(0, host->base + MMCI_STM32_IDMACTRLR); + host->dma_in_progress = false; if (!data->host_cookie) sdmmc_idma_unprep_data(host, data, 0); @@ -676,6 +699,7 @@ static struct mmci_host_ops sdmmc_variant_ops = { .dma_setup = sdmmc_idma_setup, .dma_start = sdmmc_idma_start, .dma_finalize = sdmmc_idma_finalize, + .dma_error = sdmmc_idma_error, .set_clkreg = mmci_sdmmc_set_clkreg, .set_pwrreg = mmci_sdmmc_set_pwrreg, .busy_complete = sdmmc_busy_complete,