[v3,5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node
Message ID | 20240206120322.88907-6-mihai.sain@microchip.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1495479dyb; Tue, 6 Feb 2024 04:16:36 -0800 (PST) X-Google-Smtp-Source: AGHT+IGW6D2zArU8XlB4Whm+hscLRLZenQFtwpZgR6KPof1nTrJs195JprAWWNfOcQtblvN11UkG X-Received: by 2002:ac2:5315:0:b0:511:46bc:8d2e with SMTP id c21-20020ac25315000000b0051146bc8d2emr1647654lfh.64.1707221796054; Tue, 06 Feb 2024 04:16:36 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707221796; cv=pass; d=google.com; s=arc-20160816; b=EapLL4iM2+1cxFrKain3Fzf3sA4omUPJvM5Ztjfgm4Eyr0rLM5BSPrycUaw9gCtzkM UuXxO0+Z3UPiYiTYm6VS+WarKULJ5q4YFWk0zRKtQv1WklF/q0o5yGyD36oNlBIWepMN LaH59O3nz6bX/Hu7dQPeX/8a6THjcMBVeew6G5kEZCjm+H3oa/e7C+zIgsq/iU+8ucL7 acsCnltC/jEJDu+6DjacIZgP+ThSoaQikNZ7mTTgjIsj/bProW+ffI7ssWT/Td71qAjG yBup2Uy37fU+wvAypQHY5toyKwJODutPsffySfurVtfJ1zRi3XE/0krtYjecVkdseXoH SSow== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=GLWKS9cS8bhHEXIBci1YB0TY6UaoE+KZG20gLXoMRhs=; fh=z1BuUFxxkZ+5Vpw8i4jgucL9nxYbT1ZkeacZEh7zJ2o=; b=ZgTHavZ7wVPlMGRMitmalgDAQfYav4lNYHjAueGhrBuiLli/NxbT3xiRNhISqRzoUu 9LWhtzlDWJdx23UUX6YDDR3qcHGYWFYZR6w/Kya9OzFaeoP3iXQj3fZ/bICUkScciIC+ Iwb/Xj2g4yabBDjXG4j/Zd1joI5N5Tf5COT249zJnbg9r8Cq5LZI3k3BjLsSpmiRAfZJ tBRxv9Ec3615Q0rjpWf9Kg91uPdyPzSzXNFToIpMUohLdRmsEYoMqqiktmrm+kJNO7in QXlGSKCskjr+fimTKhgJd5DSdSuLco3rGxfQi8dh7VTG/E4UHuVTQ8VSgpq+LqbuhT11 BdjA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=YZxahTgh; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=1; AJvYcCWLaNXUawnH0oXZb1Eiq3vVMgx5ewFIs0O4ullIupuWH0qydNQbpmEkWyGkswMaGwqIBty4g85B8LCgqLrmgmYGfR5ZIA== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id h7-20020aa7c607000000b005601bd4cc81si1035508edq.467.2024.02.06.04.16.35 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 04:16:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=YZxahTgh; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-54852-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id B59421F265BE for <ouuuleilei@gmail.com>; Tue, 6 Feb 2024 12:09:17 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B952813340E; Tue, 6 Feb 2024 12:04:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="YZxahTgh" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65069131E4E; Tue, 6 Feb 2024 12:04:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; cv=none; b=LnTpiiSzVzu7i4FoAbFhUw8DGPozu2ysyS7o8iqSE+NX0Z+sD9r0M5rw/Q6q0hgWufev7p0FLbZ/I4WqZpwsj1rlGtwDunjJjcoPxZ4msoWdel/T1hLdS1kAlsoaRAYT1Pb9ZSgQZkUKCPlBoAF1qtoNkReJBHwqzKG3uvItvZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; c=relaxed/simple; bh=uuhzD7h2SKOvmlK9PXKVWDeAFZG64lM+lbWLD+e9xpQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QaUbiyZIf1jkJmPzi4F30LFklXeOg2ZIHr59s+SGr0mRmajMsmgtsSeMifuZX35t8qG02LqabiFF2ZeKHd5xLcPqAuOpopNupNyfTReUl1mbvGZyc+dxDug06revZEVZcpPE8z8sTCu8Kqcsq/lXWwj4pppph5tghP/zvlL5cK0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=YZxahTgh; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221046; x=1738757046; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uuhzD7h2SKOvmlK9PXKVWDeAFZG64lM+lbWLD+e9xpQ=; b=YZxahTghDOG9+0Ox+jRyWZ3YAdIiSs6XscO0y/NPlFtp1e7Vkqn54k5Y g3I25LwI4gaFcOkXvTE2lgIr6rPiz+IvNWhXRvCrDZOdlwHlct09rjN5f 0i/lSGY9Kw9B02GVYpF4e/636wjy/RzcS0ClPU0m79G1piivnYUHzmzqc 6EPkD0sWsLYEQPLvdhrRq0JHrYPPchrQEVk9wD4Hi5N3iGKveJazM+E1o /OoHsCV0ICU0NrH8EFSzhpdKLBGb4t5moH1cg8Q1ij+y/Dht4caLdCYZ1 Ki6SYFGT1pZvGawkEOyeLlNeL5EgftsPje23B1mn+w9/QVct1yb4gREJb Q==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: aqlGfhU5TlGcsgRLZZ5F4w== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200241" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:43 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:40 -0700 From: Mihai Sain <mihai.sain@microchip.com> To: <claudiu.beznea@tuxon.dev>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> CC: Mihai Sain <mihai.sain@microchip.com> Subject: [PATCH v3 5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node Date: Tue, 6 Feb 2024 14:03:19 +0200 Message-ID: <20240206120322.88907-6-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790151802067673830 X-GMAIL-MSGID: 1790151802067673830 |
Series |
Add power-supply properties for sdmmc nodes on Microchip boards
|
|
Commit Message
Mihai Sain
Feb. 6, 2024, 12:03 p.m. UTC
The sdmmc0 controller is powered from 3.3V regulator.
Add vmmc-supply and vqmmc-supply properties to sdmmc0 node.
The sdmmc controller from SAMA5D2 MPU has support for
IO voltage signaling/switching required by the UHS sd-card.
In order to avoid the issues from the tuning procedure required by
the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
---
arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++
1 file changed, 2 insertions(+)
Comments
On 06.02.2024 14:03, Mihai Sain wrote: > The sdmmc0 controller is powered from 3.3V regulator. Same here. SDMMC0 data lines are powered by VDDSDHC which could be 1v8/3v3. [1] https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/UserGuides/SAMA5D2-Wireless-SOM1-Kit-User%27s-Guide-50002931d.pdf > Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. > The sdmmc controller from SAMA5D2 MPU has support for > IO voltage signaling/switching required by the UHS sd-card. > In order to avoid the issues from the tuning procedure required by > the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. > > Signed-off-by: Mihai Sain <mihai.sain@microchip.com> > --- > arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts > index 15239834d886..7b36e1970bb7 100644 > --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts > +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts > @@ -199,6 +199,8 @@ &sdmmc0 { > bus-width = <4>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_sdmmc0_default>; > + vmmc-supply = <&vdd_3v3>; > + vqmmc-supply = <&vdd_3v3>; > status = "okay"; > }; >
diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts index 15239834d886..7b36e1970bb7 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -199,6 +199,8 @@ &sdmmc0 { bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; + vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&vdd_3v3>; status = "okay"; };