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Tue, 6 Feb 2024 23:51:13 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 6 Feb 2024 15:51:12 -0800 From: Bjorn Andersson Date: Tue, 6 Feb 2024 15:51:11 -0800 Subject: [PATCH v3] arm64: dts: qcom: sc8280xp: Introduce additional tsens instances Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240206-sc8280xp-tsens2_3-v3-1-4577b3b38ea8@quicinc.com> X-B4-Tracking: v=1; b=H4sIAO7FwmUC/33NwQ7CIAyA4VdZOIsBBgQ9+R7GmA2K60E2YZKZZ e8u20kT4/Fv068zSRAREjlWM4mQMWEfStS7itiuCTeg6EoTwYRknBuarBGGTQMdE4QkrjVtlHe HRhqnlSLlbojgcdrM86V0h2ns42t7kfk6/adlTjkFo1sLXHrd+tPjiRaD3dv+TlYviw9D6F+GK IZRTDpuys7Bt7EsyxskRhcg+AAAAA== To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Johan Hovold , Johan Hovold , Bjorn Andersson X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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Add these and a GPU thermal-zone. Reviewed-by: Konrad Dybcio Reviewed-by: Johan Hovold Signed-off-by: Bjorn Andersson --- Changes in v3: - Sorted tsens nodes by address. - Link to v2: https://lore.kernel.org/r/20240126-sc8280xp-tsens2_3-v2-1-8504d18828de@quicinc.com Changes in v2: - Drop TM/SROT comments - Remove polling delays, rely on interrupts - Link to v1: https://lore.kernel.org/r/20240118-sc8280xp-tsens2_3-v1-1-e86bce14f6bf@quicinc.com --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 37 ++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) --- base-commit: 943b9f0ab2cfbaea148dd6ac279957eb08b96904 change-id: 20240118-sc8280xp-tsens2_3-a5fd9a48d655 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index febf28356ff8..38ecf6768b1a 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -4011,6 +4011,28 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + tsens2: thermal-sensor@c251000 { + compatible = "qcom,sc8280xp-tsens", "qcom,tsens-v2"; + reg = <0 0x0c251000 0 0x1ff>, + <0 0x0c224000 0 0x8>; + #qcom,sensors = <11>; + interrupts-extended = <&pdc 122 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 124 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens3: thermal-sensor@c252000 { + compatible = "qcom,sc8280xp-tsens", "qcom,tsens-v2"; + reg = <0 0x0c252000 0 0x1ff>, + <0 0x0c225000 0 0x8>; + #qcom,sensors = <5>; + interrupts-extended = <&pdc 123 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 125 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + tsens0: thermal-sensor@c263000 { compatible = "qcom,sc8280xp-tsens", "qcom,tsens-v2"; reg = <0 0x0c263000 0 0x1ff>, /* TM */ @@ -5212,6 +5234,21 @@ cpu-crit { }; }; + gpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 2>; + + trips { + cpu-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + mem-thermal { polling-delay-passive = <250>; polling-delay = <1000>;