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Mon, 5 Feb 2024 18:55:39 +0300 From: Alexey Romanov To: , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v3 03/20] drivers: crypto: meson: make CLK controller optional Date: Mon, 5 Feb 2024 18:55:04 +0300 Message-ID: <20240205155521.1795552-4-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240205155521.1795552-1-avromanov@salutedevices.com> References: <20240205155521.1795552-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 183204 [Feb 05 2024] X-KSMG-AntiSpam-Version: 6.1.0.3 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 7 0.3.7 6d6bf5bd8eea7373134f756a2fd73e9456bb7d1a, {Tracking_from_domain_doesnt_match_to}, salutedevices.com:7.1.1;100.64.160.123:7.1.2;127.0.0.199:7.1.2;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;smtp.sberdevices.ru:5.0.1,7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/02/05 10:19:00 #23362212 X-KSMG-AntiVirus-Status: Clean, skipped X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790075085139548824 X-GMAIL-MSGID: 1790075085139548824 Amlogic crypto IP doesn't take a clock input on some SoCs: AXG / A1 / S4 / G12. So make it optional. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 21 ++++++++------------- drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 4d1b1d5b7a54..54113c524ec5 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -250,6 +250,7 @@ static void meson_unregister_algs(struct meson_dev *mc) static const struct meson_pdata meson_gxl_pdata = { .descs_reg = 0x0, .status_reg = 0x4, + .need_clk = true, }; static const struct of_device_id meson_crypto_of_match_table[] = { @@ -285,17 +286,14 @@ static int meson_crypto_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err); return err; } - mc->busclk = devm_clk_get(&pdev->dev, "blkmv"); - if (IS_ERR(mc->busclk)) { - err = PTR_ERR(mc->busclk); - dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err); - return err; - } - err = clk_prepare_enable(mc->busclk); - if (err != 0) { - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); - return err; + if (mc->pdata->need_clk) { + mc->busclk = devm_clk_get_enabled(&pdev->dev, "blkmv"); + if (IS_ERR(mc->busclk)) { + err = PTR_ERR(mc->busclk); + dev_err(&pdev->dev, "Cannot get and enable core clock err=%d\n", err); + return err; + } } err = meson_allocate_chanlist(mc); @@ -322,7 +320,6 @@ static int meson_crypto_probe(struct platform_device *pdev) meson_unregister_algs(mc); error_flow: meson_free_chanlist(mc, mc->flow_cnt - 1); - clk_disable_unprepare(mc->busclk); return err; } @@ -337,8 +334,6 @@ static void meson_crypto_remove(struct platform_device *pdev) meson_unregister_algs(mc); meson_free_chanlist(mc, mc->flow_cnt - 1); - - clk_disable_unprepare(mc->busclk); } static struct platform_driver meson_crypto_driver = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 9ad75da214ff..a36b9bac63a0 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -82,10 +82,12 @@ struct meson_flow { * struct meson_pdata - SoC series dependent data. * @reg_descs: offset to descriptors register * @reg_status: offset to status register + * @need_clk: clock input is needed */ struct meson_pdata { u32 descs_reg; u32 status_reg; + bool need_clk; }; /*