Message ID | 20240203091214.411862-9-zhao1.liu@linux.intel.com |
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State | New |
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Wysocki" <rafael@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, Dave Hansen <dave.hansen@linux.intel.com>, "H . Peter Anvin" <hpa@zytor.com>, kvm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>, Len Brown <len.brown@intel.com>, Zhang Rui <rui.zhang@intel.com>, Zhenyu Wang <zhenyu.z.wang@intel.com>, Zhuocheng Ding <zhuocheng.ding@intel.com>, Dapeng Mi <dapeng1.mi@intel.com>, Yanting Jiang <yanting.jiang@intel.com>, Yongwei Ma <yongwei.ma@intel.com>, Vineeth Pillai <vineeth@bitbyteword.org>, Suleiman Souhlal <suleiman@google.com>, Masami Hiramatsu <mhiramat@google.com>, David Dai <davidai@google.com>, Saravana Kannan <saravanak@google.com>, Zhao Liu <zhao1.liu@intel.com> Subject: [RFC 08/26] KVM: x86: Expose TM/ACC (CPUID.0x01.edx[bit 29]) feature bit to VM Date: Sat, 3 Feb 2024 17:11:56 +0800 Message-Id: <20240203091214.411862-9-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240203091214.411862-1-zhao1.liu@linux.intel.com> References: <20240203091214.411862-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789893664975423842 X-GMAIL-MSGID: 1789893664975423842 |
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Intel Thread Director Virtualization
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Commit Message
Zhao Liu
Feb. 3, 2024, 9:11 a.m. UTC
From: Zhuocheng Ding <zhuocheng.ding@intel.com> The TM (Thermal Monitor, alias, TM1/ACC) feature is a dependency of thermal interrupt processing so that it is required for the HFI notification (a thermal interrupt) handling. According to SDM [1], the TM feature means: "The TM1 flag (bit 29) of the CPUID feature flags indicates the presence of the automatic thermal monitoring facilities that modulate clock duty cycles." Considering that the TM feature does not provide any OS interaction interface, but only indicates the presence of a hardware feature. Therefore, we do not need to perform any additional software emulation while exposing the TM feature bit. Expose the TM feature bit to the VM to support the VM in handling the thermal interrupt. [1]: SDM, vol. 3B, section 15.8.4.1, Detection of Software Controlled Clock Modulation Extension. Tested-by: Yanting Jiang <yanting.jiang@intel.com> Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com> Co-developed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> --- arch/x86/kvm/cpuid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 1ad547651022..829bb9c6516f 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -625,7 +625,7 @@ void kvm_set_cpu_caps(void) F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) | 0 /* Reserved, DS */ | F(ACPI) | F(MMX) | F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) | - 0 /* HTT, TM, Reserved, PBE */ + 0 /* HTT */ | F(ACC) | 0 /* Reserved, PBE */ ); kvm_cpu_cap_mask(CPUID_7_0_EBX,