diff mbox series

[V4,2/4] nvmem: zynqmp_nvmem: zynqmp_nvmem_probe cleanup

Message ID 20240202113843.17999-3-praveen.teja.kundanala@amd.com
State New
Headers
Series Add ZynqMP efuse access support |

Commit Message

Praveen Teja Kundanala Feb. 2, 2024, 11:38 a.m. UTC 
  - Remove static nvmem_config declaration
- Remove zynqmp_nvmem_data

Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com>
---
 drivers/nvmem/zynqmp_nvmem.c | 37 ++++++++++++------------------------
 1 file changed, 12 insertions(+), 25 deletions(-)

Comments

Akula, Kalyani Feb. 8, 2024, 6:47 a.m. UTC | #1 
>-----Original Message-----
>From: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com>
>Sent: Friday, February 2, 2024 5:09 PM
>To: srinivas.kandagatla@linaro.org; Simek, Michal <michal.simek@amd.com>;
>Akula, Kalyani <kalyani.akula@amd.com>; Kundanala, Praveen Teja
><praveen.teja.kundanala@amd.com>; devicetree@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org
>Cc: linux-kernel@vger.kernel.org
>Subject: [PATCH V4 2/4] nvmem: zynqmp_nvmem: zynqmp_nvmem_probe
>cleanup
>
>- Remove static nvmem_config declaration
>- Remove zynqmp_nvmem_data
>
>Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com>
>---
> drivers/nvmem/zynqmp_nvmem.c | 37 ++++++++++++------------------------
> 1 file changed, 12 insertions(+), 25 deletions(-)
>
>diff --git a/drivers/nvmem/zynqmp_nvmem.c
>b/drivers/nvmem/zynqmp_nvmem.c index 7f15aa89a9d0..391d8e88b270
>100644
>--- a/drivers/nvmem/zynqmp_nvmem.c
>+++ b/drivers/nvmem/zynqmp_nvmem.c
>@@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
>  * Copyright (C) 2019 Xilinx, Inc.
>+ * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
>  */
>
> #include <linux/module.h>
>@@ -11,36 +12,25 @@
>
> #define SILICON_REVISION_MASK 0xF
>
>-struct zynqmp_nvmem_data {
>-	struct device *dev;
>-	struct nvmem_device *nvmem;
>-};
>
> static int zynqmp_nvmem_read(void *context, unsigned int offset,
> 			     void *val, size_t bytes)
> {
>+	struct device *dev = context;
> 	int ret;
>-	int idcode, version;
>-	struct zynqmp_nvmem_data *priv = context;
>+	int idcode;
>+	int version;
>
> 	ret = zynqmp_pm_get_chipid(&idcode, &version);
> 	if (ret < 0)
> 		return ret;
>
>-	dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
>+	dev_dbg(dev, "Read chipid val %x %x\n", idcode, version);
> 	*(int *)val = version & SILICON_REVISION_MASK;
>
> 	return 0;
> }
>
>-static struct nvmem_config econfig = {
>-	.name = "zynqmp-nvmem",
>-	.owner = THIS_MODULE,
>-	.word_size = 1,
>-	.size = 1,
>-	.read_only = true,
>-};
>-
> static const struct of_device_id zynqmp_nvmem_match[] = {
> 	{ .compatible = "xlnx,zynqmp-nvmem-fw", },
> 	{ /* sentinel */ },
>@@ -50,21 +40,18 @@ MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
>static int zynqmp_nvmem_probe(struct platform_device *pdev)  {
> 	struct device *dev = &pdev->dev;
>-	struct zynqmp_nvmem_data *priv;
>+	struct nvmem_config econfig = {};
>
>-	priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data),
>GFP_KERNEL);
>-	if (!priv)
>-		return -ENOMEM;
>-
>-	priv->dev = dev;
>+	econfig.name = "zynqmp-nvmem";
>+	econfig.owner = THIS_MODULE;
>+	econfig.word_size = 1;
>+	econfig.size = 1;
> 	econfig.dev = dev;
> 	econfig.add_legacy_fixed_of_cells = true;
>+	econfig.read_only = true;
> 	econfig.reg_read = zynqmp_nvmem_read;
>-	econfig.priv = priv;
>-
>-	priv->nvmem = devm_nvmem_register(dev, &econfig);
>
>-	return PTR_ERR_OR_ZERO(priv->nvmem);
>+	return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &econfig));
> }
>
> static struct platform_driver zynqmp_nvmem_driver = {
>--
>2.37.6

Acked-by: Kalyani Akula <Kalyani.akula@amd.com>
 
Regards,
Kalyani
diff mbox series

Patch

diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c
index 7f15aa89a9d0..391d8e88b270 100644
--- a/drivers/nvmem/zynqmp_nvmem.c
+++ b/drivers/nvmem/zynqmp_nvmem.c
@@ -1,6 +1,7 @@ 
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2019 Xilinx, Inc.
+ * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
  */
 
 #include <linux/module.h>
@@ -11,36 +12,25 @@ 
 
 #define SILICON_REVISION_MASK 0xF
 
-struct zynqmp_nvmem_data {
-	struct device *dev;
-	struct nvmem_device *nvmem;
-};
 
 static int zynqmp_nvmem_read(void *context, unsigned int offset,
 			     void *val, size_t bytes)
 {
+	struct device *dev = context;
 	int ret;
-	int idcode, version;
-	struct zynqmp_nvmem_data *priv = context;
+	int idcode;
+	int version;
 
 	ret = zynqmp_pm_get_chipid(&idcode, &version);
 	if (ret < 0)
 		return ret;
 
-	dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
+	dev_dbg(dev, "Read chipid val %x %x\n", idcode, version);
 	*(int *)val = version & SILICON_REVISION_MASK;
 
 	return 0;
 }
 
-static struct nvmem_config econfig = {
-	.name = "zynqmp-nvmem",
-	.owner = THIS_MODULE,
-	.word_size = 1,
-	.size = 1,
-	.read_only = true,
-};
-
 static const struct of_device_id zynqmp_nvmem_match[] = {
 	{ .compatible = "xlnx,zynqmp-nvmem-fw", },
 	{ /* sentinel */ },
@@ -50,21 +40,18 @@  MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
 static int zynqmp_nvmem_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct zynqmp_nvmem_data *priv;
+	struct nvmem_config econfig = {};
 
-	priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	priv->dev = dev;
+	econfig.name = "zynqmp-nvmem";
+	econfig.owner = THIS_MODULE;
+	econfig.word_size = 1;
+	econfig.size = 1;
 	econfig.dev = dev;
 	econfig.add_legacy_fixed_of_cells = true;
+	econfig.read_only = true;
 	econfig.reg_read = zynqmp_nvmem_read;
-	econfig.priv = priv;
-
-	priv->nvmem = devm_nvmem_register(dev, &econfig);
 
-	return PTR_ERR_OR_ZERO(priv->nvmem);
+	return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &econfig));
 }
 
 static struct platform_driver zynqmp_nvmem_driver = {