[v2,2/3] MIPS: Clear Cause.BD in instruction_pointer_set

Message ID 20240202-exception_ip-v2-2-e6894d5ce705@flygoat.com
State New
Headers
Series Handle delay slot for extable lookup |

Commit Message

Jiaxun Yang Feb. 2, 2024, 12:30 p.m. UTC
  Clear Cause.BD after we use instruction_pointer_set to override
EPC.

This can prevent exception_epc check against instruction code at
new return address.
It won't be considered as "in delay slot" after epc being overridden
anyway.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/include/asm/ptrace.h | 1 +
 1 file changed, 1 insertion(+)
  

Patch

diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 701a233583c2..d14d0e37ad02 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -60,6 +60,7 @@  static inline void instruction_pointer_set(struct pt_regs *regs,
                                            unsigned long val)
 {
 	regs->cp0_epc = val;
+	regs->cp0_cause &= ~CAUSEF_BD;
 }
 
 /* Query offset/name of register from its name/offset */