Message ID | 20240201215007.439503-1-Frank.Li@nxp.com |
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b=NpIFy/Mn4mrbwlIYKMBgGZzCFJI1MM13wpzCddfhJymHz+qS687BPlewo3qu/voF34qTjr9PZZ7g/mj6eEcDRn7F3FmN30pM7ZJnpT61dd/85QjU27Qm+yS/Bi59RxI5+EDTsHJm5UVIpJGos0nIWAtwCWeOwXiYKzEv1mpWrZU= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from DB9PR04MB9626.eurprd04.prod.outlook.com (2603:10a6:10:309::18) by AM9PR04MB8588.eurprd04.prod.outlook.com (2603:10a6:20b:43b::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7249.30; Thu, 1 Feb 2024 21:50:25 +0000 Received: from DB9PR04MB9626.eurprd04.prod.outlook.com ([fe80::9b0f:a9d8:1523:5759]) by DB9PR04MB9626.eurprd04.prod.outlook.com ([fe80::9b0f:a9d8:1523:5759%4]) with mapi id 15.20.7228.029; Thu, 1 Feb 2024 21:50:25 +0000 From: Frank Li <Frank.Li@nxp.com> To: Vinod Koul <vkoul@kernel.org>, Wen He <wen.he_1@nxp.com>, Peng Ma <peng.ma@nxp.com>, Jiaheng Fan <jiaheng.fan@nxp.com>, dmaengine@vger.kernel.org (open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Cc: imx@lists.linux.dev Subject: [PATCH 1/1] dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read Date: Thu, 1 Feb 2024 16:50:07 -0500 Message-Id: <20240201215007.439503-1-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SJ0PR03CA0080.namprd03.prod.outlook.com (2603:10b6:a03:331::25) To DB9PR04MB9626.eurprd04.prod.outlook.com (2603:10a6:10:309::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB9PR04MB9626:EE_|AM9PR04MB8588:EE_ X-MS-Office365-Filtering-Correlation-Id: a14b217e-165c-4e61-009e-08dc236fcbdd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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[1/1] dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read
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Commit Message
Frank Li
Feb. 1, 2024, 9:50 p.m. UTC
From: Peng Ma <peng.ma@nxp.com> There is chip (ls1028a) errata: The SoC may hang on 16 byte unaligned read transactions by QDMA. Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller. Workaround: Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ). Implement this workaround. Cc: stable@vger.kernel.org Fixes: b092529e0aa0 ("dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs") Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/dma/fsl-qdma.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
Comments
On Thu, 01 Feb 2024 16:50:07 -0500, Frank Li wrote: > There is chip (ls1028a) errata: > > The SoC may hang on 16 byte unaligned read transactions by QDMA. > > Unaligned read transactions initiated by QDMA may stall in the NOC > (Network On-Chip), causing a deadlock condition. Stalled transactions will > trigger completion timeouts in PCIe controller. > > [...] Applied, thanks! [1/1] dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read commit: 9d739bccf261dd93ec1babf82f5c5d71dd4caa3e Best regards,
diff --git a/drivers/dma/fsl-qdma.c b/drivers/dma/fsl-qdma.c index 47cb284680494..11d10dcd8b45d 100644 --- a/drivers/dma/fsl-qdma.c +++ b/drivers/dma/fsl-qdma.c @@ -109,6 +109,7 @@ #define FSL_QDMA_CMD_WTHROTL_OFFSET 20 #define FSL_QDMA_CMD_DSEN_OFFSET 19 #define FSL_QDMA_CMD_LWC_OFFSET 16 +#define FSL_QDMA_CMD_PF BIT(17) /* Field definition for Descriptor status */ #define QDMA_CCDF_STATUS_RTE BIT(5) @@ -384,7 +385,8 @@ static void fsl_qdma_comp_fill_memcpy(struct fsl_qdma_comp *fsl_comp, qdma_csgf_set_f(csgf_dest, len); /* Descriptor Buffer */ cmd = cpu_to_le32(FSL_QDMA_CMD_RWTTYPE << - FSL_QDMA_CMD_RWTTYPE_OFFSET); + FSL_QDMA_CMD_RWTTYPE_OFFSET) | + FSL_QDMA_CMD_PF; sdf->data = QDMA_SDDF_CMD(cmd); cmd = cpu_to_le32(FSL_QDMA_CMD_RWTTYPE <<