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The gs101 Product ID and revisions registers have a behaviour split between old Exynos SoCs and new SoCs. The sub-revision is reported in CHIPID_REV register in [19:16] bits but main revision is still present in Product ID [7:0]. To construct soc_info->revision correctly for gs101 the main_rev should not be reset from a value read from CHIPID_REV. Signed-off-by: Alexey Klimov --- drivers/soc/samsung/exynos-chipid.c | 20 ++++++++++++++++---- include/linux/soc/samsung/exynos-chipid.h | 1 + 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index 7fee6094db12..3b952ffd8cf7 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -87,14 +87,26 @@ static int exynos_chipid_get_chipid_info(struct regmap *regmap, soc_info->product_id = val & EXYNOS_MASK; if (data->rev_reg != EXYNOS_CHIPID_REG_PRO_ID) { - ret = regmap_read(regmap, data->rev_reg, &val); + unsigned int val2; + + ret = regmap_read(regmap, data->rev_reg, &val2); if (ret < 0) return ret; + + if (data->main_rev_shift == 0) + main_rev = (val >> data->main_rev_shift) + & EXYNOS_REV_PART_MASK_GS101; + else + main_rev = (val2 >> data->main_rev_shift) + & EXYNOS_REV_PART_MASK; + + sub_rev = (val2 >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; + } else { + main_rev = (val >> data->main_rev_shift) & EXYNOS_REV_PART_MASK; + sub_rev = (val >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; } - main_rev = (val >> data->main_rev_shift) & EXYNOS_REV_PART_MASK; - sub_rev = (val >> data->sub_rev_shift) & EXYNOS_REV_PART_MASK; - soc_info->revision = (main_rev << EXYNOS_REV_PART_SHIFT) | sub_rev; + soc_info->revision = (main_rev << EXYNOS_REV_PART_SHIFT) | sub_rev; return 0; } diff --git a/include/linux/soc/samsung/exynos-chipid.h b/include/linux/soc/samsung/exynos-chipid.h index 62f0e2531068..1eb13068f513 100644 --- a/include/linux/soc/samsung/exynos-chipid.h +++ b/include/linux/soc/samsung/exynos-chipid.h @@ -10,6 +10,7 @@ #define EXYNOS_CHIPID_REG_PRO_ID 0x00 #define EXYNOS_REV_PART_MASK 0xf +#define EXYNOS_REV_PART_MASK_GS101 0xff #define EXYNOS_REV_PART_SHIFT 4 #define EXYNOS_MASK 0xfffff000