diff mbox series

arm64: dts: rockchip: add attiny_rst_gate to Ringneck

Message ID 20240201124427.279986-1-jakob.unterwurzacher@theobroma-systems.com
State New
Headers
Series arm64: dts: rockchip: add attiny_rst_gate to Ringneck |

Commit Message

Jakob Unterwurzacher Feb. 1, 2024, 12:44 p.m. UTC 
  Ringneck v1.4 can contain (placement option) an on-board ATtiny
microcontroller instead of an STM32. In normal operation, this
is transparent to the software, as both microcontrollers emulate
the same ICs (amc6821 and isl1208).

For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is
used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if
we are running on an older Ringneck revision, SWITCH_REG1 is not connected
and has no effect.

Add attiny-updi-gate-regulator so userspace can control it via sysfs:

  echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state

Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
index dec29a75d361..1f7f4b2ea66a 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
@@ -15,6 +15,12 @@  aliases {
 		rtc1 = &rk809;
 	};
 
+	/* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */
+	attiny-updi-gate-regulator {
+		compatible = "regulator-output";
+		vout-supply = <&vg_attiny_updi>;
+	};
+
 	emmc_pwrseq: emmc-pwrseq {
 		compatible = "mmc-pwrseq-emmc";
 		pinctrl-0 = <&emmc_reset>;
@@ -146,6 +152,7 @@  rk809: pmic@20 {
 		vcc5-supply = <&vcc_3v3>;
 		vcc6-supply = <&vcc_3v3>;
 		vcc7-supply = <&vcc_3v3>;
+		vcc8-supply = <&vcc5v0_sys>;
 		vcc9-supply = <&vcc5v0_sys>;
 
 		regulators {
@@ -290,6 +297,11 @@  regulator-state-mem {
 					regulator-suspend-microvolt = <1800000>;
 				};
 			};
+
+			/* supplies the gate of the ATtiny UPDI pass FET */
+			vg_attiny_updi: SWITCH_REG1 {
+				regulator-name = "vg_attiny_updi";
+			};
 		};
 	};
 };