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Thu, 1 Feb 2024 07:07:12 -0600 Received: from localhost (jluthra.dhcp.ti.com [172.24.227.217]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 411D7Bff083003; Thu, 1 Feb 2024 07:07:12 -0600 From: Jai Luthra Date: Thu, 1 Feb 2024 18:37:02 +0530 Subject: [PATCH 3/4] arm64: dts: ti: k3-am62p: Add nodes for CSI-RX Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240201-am62p_csi-v1-3-c83bb9eaeb49@ti.com> References: <20240201-am62p_csi-v1-0-c83bb9eaeb49@ti.com> In-Reply-To: <20240201-am62p_csi-v1-0-c83bb9eaeb49@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Davis , Bryan Brattlof , Dhruva Gole CC: , , , Vaishnav Achath , Devarsh Thakkar , Aradhya Bhatia , Jai Luthra X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2254; i=j-luthra@ti.com; h=from:subject:message-id; bh=5ghTK3wJlbTR8AXSwps2iXRCuqJEWnnANC2exXFGf0I=; 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Enable all of these IPs in the devicetree. Signed-off-by: Jai Luthra Reviewed-by: Vaishnav Achath --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 61 +++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 57ec4ef334e4..fdd835a04327 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -928,4 +928,65 @@ mcasp2: audio-controller@2b20000 { power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; + + ti_csi2rx0: ticsi2rx@30102000 { + compatible = "ti,j721e-csi2rx-shim"; + reg = <0x00 0x30102000 0x00 0x1000>; + ranges; + #address-cells = <2>; + #size-cells = <2>; + dmas = <&main_bcdma_csi 0 0x5000 0>; + dma-names = "rx0"; + power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + + cdns_csi2rx0: csi-bridge@30101000 { + compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; + reg = <0x00 0x30101000 0x00 0x1000>; + clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, + <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; + clock-names = "sys_clk", "p_clk", "pixel_if0_clk", + "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; + phys = <&dphy0>; + phy-names = "dphy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi0_port0: port@0 { + reg = <0>; + status = "disabled"; + }; + + csi0_port1: port@1 { + reg = <1>; + status = "disabled"; + }; + + csi0_port2: port@2 { + reg = <2>; + status = "disabled"; + }; + + csi0_port3: port@3 { + reg = <3>; + status = "disabled"; + }; + + csi0_port4: port@4 { + reg = <4>; + status = "disabled"; + }; + }; + }; + }; + + dphy0: phy@30110000 { + compatible = "cdns,dphy-rx"; + reg = <0x00 0x30110000 0x00 0x1100>; + #phy-cells = <0>; + power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + }; };