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[3/4] arm64: dts: ti: k3-am62p: Add nodes for CSI-RX

Message ID 20240201-am62p_csi-v1-3-c83bb9eaeb49@ti.com
State New
Headers
Series arm64: dts: ti: Enable camera for SK-AM62P |

Commit Message

Jai Luthra Feb. 1, 2024, 1:07 p.m. UTC 
  AM62P supports image capture via the MIPI CSI-2 protocol, it uses three
IPs to achieve this: Cadence DPHY, Cadence CSI-RX, and TI's pixelgrabber
wrapper on top. Enable all of these IPs in the devicetree.

Signed-off-by: Jai Luthra <j-luthra@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 61 +++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

Comments

Vaishnav Achath Feb. 12, 2024, 12:06 p.m. UTC | #1 
On 01/02/24 18:37, Jai Luthra wrote:
> AM62P supports image capture via the MIPI CSI-2 protocol, it uses three
> IPs to achieve this: Cadence DPHY, Cadence CSI-RX, and TI's pixelgrabber
> wrapper on top. Enable all of these IPs in the devicetree.
> 

Add nodes and keep them disabled sounds more apt here as you are keeping 
all of these disabled.

> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 61 +++++++++++++++++++++++++++++++
>   1 file changed, 61 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 57ec4ef334e4..fdd835a04327 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -928,4 +928,65 @@ mcasp2: audio-controller@2b20000 {
>   		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
>   		status = "disabled";
>   	};
> +
> +	ti_csi2rx0: ticsi2rx@30102000 {
> +		compatible = "ti,j721e-csi2rx-shim";
> +		reg = <0x00 0x30102000 0x00 0x1000>;
> +		ranges;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		dmas = <&main_bcdma_csi 0 0x5000 0>;
> +		dma-names = "rx0";
> +		power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +
> +		cdns_csi2rx0: csi-bridge@30101000 {
> +			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
> +			reg = <0x00 0x30101000 0x00 0x1000>;
> +			clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
> +				<&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
> +			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
> +				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
> +			phys = <&dphy0>;
> +			phy-names = "dphy";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				csi0_port0: port@0 {
> +					reg = <0>;
> +					status = "disabled";
> +				};
> +
> +				csi0_port1: port@1 {
> +					reg = <1>;
> +					status = "disabled";
> +				};
> +
> +				csi0_port2: port@2 {
> +					reg = <2>;
> +					status = "disabled";
> +				};
> +
> +				csi0_port3: port@3 {
> +					reg = <3>;
> +					status = "disabled";
> +				};
> +
> +				csi0_port4: port@4 {
> +					reg = <4>;
> +					status = "disabled";
> +				};
> +			};
> +		};
> +	};
> +
> +	dphy0: phy@30110000 {
> +		compatible = "cdns,dphy-rx";
> +		reg = <0x00 0x30110000 0x00 0x1100>;
> +		#phy-cells = <0>;
> +		power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};

Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>

>   };
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 57ec4ef334e4..fdd835a04327 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -928,4 +928,65 @@  mcasp2: audio-controller@2b20000 {
 		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
 		status = "disabled";
 	};
+
+	ti_csi2rx0: ticsi2rx@30102000 {
+		compatible = "ti,j721e-csi2rx-shim";
+		reg = <0x00 0x30102000 0x00 0x1000>;
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		dmas = <&main_bcdma_csi 0 0x5000 0>;
+		dma-names = "rx0";
+		power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+
+		cdns_csi2rx0: csi-bridge@30101000 {
+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+			reg = <0x00 0x30101000 0x00 0x1000>;
+			clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
+				<&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+			phys = <&dphy0>;
+			phy-names = "dphy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				csi0_port0: port@0 {
+					reg = <0>;
+					status = "disabled";
+				};
+
+				csi0_port1: port@1 {
+					reg = <1>;
+					status = "disabled";
+				};
+
+				csi0_port2: port@2 {
+					reg = <2>;
+					status = "disabled";
+				};
+
+				csi0_port3: port@3 {
+					reg = <3>;
+					status = "disabled";
+				};
+
+				csi0_port4: port@4 {
+					reg = <4>;
+					status = "disabled";
+				};
+			};
+		};
+	};
+
+	dphy0: phy@30110000 {
+		compatible = "cdns,dphy-rx";
+		reg = <0x00 0x30110000 0x00 0x1100>;
+		#phy-cells = <0>;
+		power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
 };