diff mbox series

dt-bindings: mfd: syscon: Add ti,k3-pcie-ctrl compatible

Message ID 20240131112342.1300893-1-s-vadapalli@ti.com
State New
Headers
Series dt-bindings: mfd: syscon: Add ti,k3-pcie-ctrl compatible |

Commit Message

Siddharth Vadapalli Jan. 31, 2024, 11:23 a.m. UTC 
  The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
used to configure the link speed, lane count and mode of operation of
the respective PCIe instance. Add compatible for allowing the PCIe
driver to obtain a regmap for the PCIE_CTRL register within the System
Controller device-tree node in order to configure the PCIe instance
accordingly.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

This patch is based on linux-next tagged next-20240131.

 Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
 1 file changed, 1 insertion(+)

Comments

Andrew Davis Jan. 31, 2024, 4:13 p.m. UTC | #1 
On 1/31/24 5:23 AM, Siddharth Vadapalli wrote:
> The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
> used to configure the link speed, lane count and mode of operation of
> the respective PCIe instance. Add compatible for allowing the PCIe
> driver to obtain a regmap for the PCIE_CTRL register within the System
> Controller device-tree node in order to configure the PCIe instance
> accordingly.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> 
> This patch is based on linux-next tagged next-20240131.
> 
>   Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 084b5c2a2a3c..da571a24e21f 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -73,6 +73,7 @@ properties:
>                 - rockchip,rv1126-qos
>                 - starfive,jh7100-sysmain
>                 - ti,am654-dss-oldi-io-ctrl
> +              - ti,k3-pcie-ctrl

This might not be the same for all K3 devices, you should use
the name of the first device which uses this, so:

ti,j721e-pcie-ctrl

Andrew

>   
>             - const: syscon
>
Siddharth Vadapalli Feb. 1, 2024, 4:48 a.m. UTC | #2 
Hello Andrew,

On 31/01/24 21:43, Andrew Davis wrote:
> On 1/31/24 5:23 AM, Siddharth Vadapalli wrote:
>> The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
>> used to configure the link speed, lane count and mode of operation of
>> the respective PCIe instance. Add compatible for allowing the PCIe
>> driver to obtain a regmap for the PCIE_CTRL register within the System
>> Controller device-tree node in order to configure the PCIe instance
>> accordingly.
>>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>>
>> This patch is based on linux-next tagged next-20240131.
>>
>>   Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> index 084b5c2a2a3c..da571a24e21f 100644
>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> @@ -73,6 +73,7 @@ properties:
>>                 - rockchip,rv1126-qos
>>                 - starfive,jh7100-sysmain
>>                 - ti,am654-dss-oldi-io-ctrl
>> +              - ti,k3-pcie-ctrl
> 
> This might not be the same for all K3 devices, you should use
> the name of the first device which uses this, so:
> 
> ti,j721e-pcie-ctrl

It is the same for all K3 devices so far. However, since the convention appears
to be the first device that it is applicable to as you pointed out, I will post
the v2 patch for this accordingly.
Krzysztof Kozlowski Feb. 1, 2024, 7:31 a.m. UTC | #3 
On 01/02/2024 05:48, Siddharth Vadapalli wrote:
> Hello Andrew,
> 
> On 31/01/24 21:43, Andrew Davis wrote:
>> On 1/31/24 5:23 AM, Siddharth Vadapalli wrote:
>>> The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
>>> used to configure the link speed, lane count and mode of operation of
>>> the respective PCIe instance. Add compatible for allowing the PCIe
>>> driver to obtain a regmap for the PCIE_CTRL register within the System
>>> Controller device-tree node in order to configure the PCIe instance
>>> accordingly.
>>>
>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>>> ---
>>>
>>> This patch is based on linux-next tagged next-20240131.
>>>
>>>   Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> index 084b5c2a2a3c..da571a24e21f 100644
>>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> @@ -73,6 +73,7 @@ properties:
>>>                 - rockchip,rv1126-qos
>>>                 - starfive,jh7100-sysmain
>>>                 - ti,am654-dss-oldi-io-ctrl
>>> +              - ti,k3-pcie-ctrl
>>
>> This might not be the same for all K3 devices, you should use
>> the name of the first device which uses this, so:
>>
>> ti,j721e-pcie-ctrl
> 
> It is the same for all K3 devices so far. However, since the convention appears
> to be the first device that it is applicable to as you pointed out, I will post
> the v2 patch for this accordingly.

This was repeated so many times... so one more. Compatibles are specific
to SoC, not to family.

https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42

Best regards,
Krzysztof
Siddharth Vadapalli Feb. 1, 2024, 9:02 a.m. UTC | #4 
Hello Krzysztof,

On 01/02/24 13:01, Krzysztof Kozlowski wrote:
> On 01/02/2024 05:48, Siddharth Vadapalli wrote:
>> Hello Andrew,
>>
>> On 31/01/24 21:43, Andrew Davis wrote:
>>> On 1/31/24 5:23 AM, Siddharth Vadapalli wrote:
>>>> The PCIE_CTRL registers within the CTRL_MMR space of TI's K3 SoCs are
>>>> used to configure the link speed, lane count and mode of operation of
>>>> the respective PCIe instance. Add compatible for allowing the PCIe
>>>> driver to obtain a regmap for the PCIE_CTRL register within the System
>>>> Controller device-tree node in order to configure the PCIe instance
>>>> accordingly.
>>>>
>>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>>>> ---
>>>>
>>>> This patch is based on linux-next tagged next-20240131.
>>>>
>>>>   Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>>>   1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>> index 084b5c2a2a3c..da571a24e21f 100644
>>>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>> @@ -73,6 +73,7 @@ properties:
>>>>                 - rockchip,rv1126-qos
>>>>                 - starfive,jh7100-sysmain
>>>>                 - ti,am654-dss-oldi-io-ctrl
>>>> +              - ti,k3-pcie-ctrl
>>>
>>> This might not be the same for all K3 devices, you should use
>>> the name of the first device which uses this, so:
>>>
>>> ti,j721e-pcie-ctrl
>>
>> It is the same for all K3 devices so far. However, since the convention appears
>> to be the first device that it is applicable to as you pointed out, I will post
>> the v2 patch for this accordingly.
> 
> This was repeated so many times... so one more. Compatibles are specific
> to SoC, not to family.
> 
> https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42

Thank you for reviewing the patch and sharing your feedback. I will make sure
not to repeat this in my future patches.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c..da571a24e21f 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -73,6 +73,7 @@  properties:
               - rockchip,rv1126-qos
               - starfive,jh7100-sysmain
               - ti,am654-dss-oldi-io-ctrl
+              - ti,k3-pcie-ctrl
 
           - const: syscon