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([82.78.167.87]) by smtp.gmail.com with ESMTPSA id vk6-20020a170907cbc600b00a3524be5a86sm5212966ejc.103.2024.01.31.02.20.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Jan 2024 02:20:44 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: wim@linux-watchdog.org, linux@roeck-us.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, biju.das.jz@bp.renesas.com Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 10/11] arm64: dts: renesas: r9a08g045: Add watchdog node Date: Wed, 31 Jan 2024 12:20:16 +0200 Message-Id: <20240131102017.1841495-11-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240131102017.1841495-1-claudiu.beznea.uj@bp.renesas.com> References: <20240131102017.1841495-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789618638894197035 X-GMAIL-MSGID: 1789618638894197035 From: Claudiu Beznea Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S SoC (R9108G045). Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v2: - collected tags arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index 5facfad96158..dfee878c0f49 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -264,6 +264,20 @@ gic: interrupt-controller@12400000 { <0x0 0x12440000 0 0x60000>; interrupts = ; }; + + wdt0: watchdog@12800800 { + compatible = "renesas,r9a08g045-wdt", "renesas,rzg2l-wdt"; + reg = <0 0x12800800 0 0x400>; + clocks = <&cpg CPG_MOD R9A08G045_WDT0_PCLK>, + <&cpg CPG_MOD R9A08G045_WDT0_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = , + ; + interrupt-names = "wdt", "perrout"; + resets = <&cpg R9A08G045_WDT0_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; + }; }; timer {