[v5,13/21] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode for yosemite4 schematic change
| Message ID | 20240131084134.328307-14-Delphine_CC_Chiu@wiwynn.com |
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From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
To: patrick@stwcx.xyz,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>,
devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 13/21] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc
mode for yosemite4 schematic change
Date: Wed, 31 Jan 2024 16:41:24 +0800
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| Series |
Add i2c-mux and eeprom devices for Meta Yosemite 4
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Commit Message
Delphine CC Chiu
Jan. 31, 2024, 8:41 a.m. UTC
Revise adc128d818 adc mode for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index bb4cba8f057e..4cf4b0ca1024 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -1010,19 +1010,19 @@ &i2c14 { adc@1d { compatible = "ti,adc128d818"; reg = <0x1d>; - ti,mode = /bits/ 8 <2>; + ti,mode = /bits/ 8 <1>; }; - adc@35 { + adc@36 { compatible = "ti,adc128d818"; - reg = <0x35>; - ti,mode = /bits/ 8 <2>; + reg = <0x36>; + ti,mode = /bits/ 8 <1>; }; adc@37 { compatible = "ti,adc128d818"; reg = <0x37>; - ti,mode = /bits/ 8 <2>; + ti,mode = /bits/ 8 <1>; }; power-sensor@40 {