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Tue, 30 Jan 2024 13:51:30 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40UJpTKw005747; Tue, 30 Jan 2024 13:51:29 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Andrew Davis Subject: [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to SerDes control nodes Date: Tue, 30 Jan 2024 13:51:28 -0600 Message-ID: <20240130195128.58748-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240130195128.58748-1-afd@ti.com> References: <20240130195128.58748-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789546311371121159 X-GMAIL-MSGID: 1789546311371121159 This matches the binding for this register region which fixes a couple DTS check warnings. While here trim the leading 0s from the "reg" definition. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index fcea544656360..62a68740dac6e 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -483,13 +483,13 @@ scm_conf: scm-conf@100000 { ranges = <0x0 0x0 0x00100000 0x1c000>; serdes0_clk: clock@4080 { - compatible = "syscon"; - reg = <0x00004080 0x4>; + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4080 0x4>; }; serdes1_clk: clock@4090 { - compatible = "syscon"; - reg = <0x00004090 0x4>; + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4090 0x4>; }; serdes_mux: mux-controller {