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Tue, 30 Jan 2024 04:20:48 -0600 Received: from localhost (a0498981-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.68.216]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKln4027139; Tue, 30 Jan 2024 04:20:48 -0600 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain Date: Tue, 30 Jan 2024 15:50:43 +0530 Message-ID: <20240130102044.120483-3-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130102044.120483-1-b-kapoor@ti.com> References: <20240130102044.120483-1-b-kapoor@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789510430781491721 X-GMAIL-MSGID: 1789510430781491721 CAN instance 0 in the main domain is brought on the J7200 SoM through header J1. Thus, Add transceiver dt node to add support for this CAN instance. Also, add the mux dt nodes to route CAN High and Low lines coming from the SoC to the Common Processor Board. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 35 +++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index ea47f10d393a..0010600b8176 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -5,6 +5,8 @@ /dts-v1/; +#include + #include "k3-j7200.dtsi" / { @@ -80,6 +82,25 @@ rtos_ipc_memory_region: ipc-memories@a4000000 { no-map; }; }; + + mux0: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>; + }; + + mux1: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>; + }; + + transceiver0: can-phy0 { + /* standby pin has been grounded by default */ + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; }; &wkup_pmx0 { @@ -142,6 +163,13 @@ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ >; }; + + main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */ + J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */ + >; + }; }; &hbmc { @@ -478,3 +506,10 @@ partition@3fc0000 { }; }; }; + +&main_mcan0 { + status = "okay"; + pinctrl-0 = <&main_mcan0_pins_default>; + pinctrl-names = "default"; + phys = <&transceiver0>; +};