Message ID | 20240130093812.1746512-3-andre.draszik@linaro.org |
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State | New |
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[34.141.189.94]) by smtp.gmail.com with ESMTPSA id q10-20020aa7cc0a000000b0055ef56f4575sm2281225edt.39.2024.01.30.01.38.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 01:38:27 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= <andre.draszik@linaro.org> To: peter.griffin@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, kernel-team@android.com, tudor.ambarus@linaro.org, willmcvicker@google.com, semen.protsenko@linaro.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9?= =?utf-8?q?_Draszik?= <andre.draszik@linaro.org> Subject: [PATCH v2 2/6] arm64: dts: exynos: gs101: fix usi8 default mode Date: Tue, 30 Jan 2024 09:36:41 +0000 Message-ID: <20240130093812.1746512-3-andre.draszik@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240130093812.1746512-1-andre.draszik@linaro.org> References: <20240130093812.1746512-1-andre.draszik@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789507779490750111 X-GMAIL-MSGID: 1789507779490750111 |
Series |
gs101 oriole: peripheral block 0 (peric0) fixes
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Commit Message
André Draszik
Jan. 30, 2024, 9:36 a.m. UTC
While commit 6d44d1a1fb62 ("arm64: dts: exynos: gs101: define USI8 with I2C configuration") states that the USI8 CONFIG is 0 at reset, the boot loader has configured it by the time Linux runs and it has a different value at this stage. Since we want board DTS files to explicitly select the mode, we should set it to none here so as to ensure things don't work by accident and to make it clear that board DTS actually need to set the mode based on the configuration. Fixes: 6d44d1a1fb62 ("arm64: dts: exynos: gs101: define USI8 with I2C configuration") Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> --- v2: collect Reviewed-by: tags --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 + 1 file changed, 1 insertion(+)
Comments
On 30/01/2024 10:36, André Draszik wrote: > While commit 6d44d1a1fb62 ("arm64: dts: exynos: gs101: define USI8 with > I2C configuration") states that the USI8 CONFIG is 0 at reset, the boot > loader has configured it by the time Linux runs and it has a different > value at this stage. This issue was pointed during review: https://lore.kernel.org/all/CAPLW+4=U9DBmwgxyWz3cy=V-Ui7s2Z9um4xbEuyax1o=0zB_NA@mail.gmail.com/ Yet you posted new version of patchset not implementing this, just to do it week later as new patch. Sorry guys, it seems you need much more time to accept and go through review, I will use two weeks delay time for applying GS patches. Now, for the patch, we don't do it for any other nodes which have 0 as reset value and we do not know what bootloader does there. Bootloader also can change. This is a required property, therefore please explain me how, really how, this can happen: " we should set it to none here so as to ensure things don't work by accident" NAK Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index aaac04df5e65..bc251e565be6 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -384,6 +384,7 @@ usi8: usi@109700c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x101c>; + samsung,mode = <USI_V2_NONE>; status = "disabled"; hsi2c_8: i2c@10970000 {