[net-next,v4,10/11] stmmac: intel: interface switching support for EHL platform
Commit Message
From: Choong Yong Liang <yong.liang.choong@intel.com>
'intel_get_pcs_neg_mode' and 'intel_config_serdes' was provided to
handle interface mode change for EHL platform.
Modphy register lane was provided to configure serdes on interface
mode changing.
Signed-off-by: Choong Yong Liang <yong.liang.choong@intel.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-intel.c | 27 ++++++++++++++++---
.../net/ethernet/stmicro/stmmac/dwmac-intel.h | 4 +++
2 files changed, 28 insertions(+), 3 deletions(-)
@@ -760,6 +760,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
static int ehl_common_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
+ struct intel_priv_data *intel_priv = plat->bsp_priv;
+
plat->rx_queues_to_use = 8;
plat->tx_queues_to_use = 8;
plat->flags |= STMMAC_FLAG_USE_PHY_WOL;
@@ -775,19 +777,26 @@ static int ehl_common_data(struct pci_dev *pdev,
plat->safety_feat_cfg->prtyen = 0;
plat->safety_feat_cfg->tmouten = 0;
+ intel_priv->tsn_lane_registers = ehl_tsn_lane_registers;
+ intel_priv->max_tsn_lane_registers = ARRAY_SIZE(ehl_tsn_lane_registers);
+
return intel_mgbe_common_data(pdev, plat);
}
static int ehl_sgmii_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
+ struct intel_priv_data *intel_priv = plat->bsp_priv;
+
plat->bus_id = 1;
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
- plat->speed_mode_2500 = intel_speed_mode_2500;
+ plat->max_speed = SPEED_2500;
plat->serdes_powerup = intel_serdes_powerup;
plat->serdes_powerdown = intel_serdes_powerdown;
-
+ plat->get_pcs_neg_mode = intel_get_pcs_neg_mode;
+ plat->config_serdes = intel_config_serdes;
plat->clk_ptp_rate = 204800000;
+ intel_priv->pid_modphy = PID_MODPHY3;
return ehl_common_data(pdev, plat);
}
@@ -841,10 +850,16 @@ static struct stmmac_pci_info ehl_pse0_rgmii1g_info = {
static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
+ struct intel_priv_data *intel_priv = plat->bsp_priv;
+
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
- plat->speed_mode_2500 = intel_speed_mode_2500;
+ plat->max_speed = SPEED_2500;
plat->serdes_powerup = intel_serdes_powerup;
plat->serdes_powerdown = intel_serdes_powerdown;
+ plat->get_pcs_neg_mode = intel_get_pcs_neg_mode;
+ plat->config_serdes = intel_config_serdes;
+ intel_priv->pid_modphy = PID_MODPHY1;
+
return ehl_pse0_common_data(pdev, plat);
}
@@ -882,10 +897,16 @@ static struct stmmac_pci_info ehl_pse1_rgmii1g_info = {
static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
+ struct intel_priv_data *intel_priv = plat->bsp_priv;
+
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
plat->speed_mode_2500 = intel_speed_mode_2500;
plat->serdes_powerup = intel_serdes_powerup;
plat->serdes_powerdown = intel_serdes_powerdown;
+ plat->get_pcs_neg_mode = intel_get_pcs_neg_mode;
+ plat->config_serdes = intel_config_serdes;
+ intel_priv->pid_modphy = PID_MODPHY1;
+
return ehl_pse1_common_data(pdev, plat);
}
@@ -123,6 +123,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = {
{ PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G },
{}
};
+
+static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11};
+#else
+static const int ehl_tsn_lane_registers[] = {};
#endif /* CONFIG_INTEL_PMC_IPC */
#endif /* __DWMAC_INTEL_H__ */