[v3,1/4] dt-bindings: perf: fsl-imx-ddr: Add i.MX95 compatible

Message ID 20240129101433.2429536-1-xu.yang_2@nxp.com
State New
Headers
Series [v3,1/4] dt-bindings: perf: fsl-imx-ddr: Add i.MX95 compatible |

Commit Message

Xu Yang Jan. 29, 2024, 10:14 a.m. UTC
  i.MX95 has a DDR pmu. This will add a compatible for it.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

---
Changes in v2:
 - no changes
Changes in v3:
 - let imx95 compatilbe with imx93
---
 Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 3 +++
 1 file changed, 3 insertions(+)
  

Comments

Conor Dooley Jan. 29, 2024, 5 p.m. UTC | #1
Acked-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.
  

Patch

diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
index 6c96a4204e5d..37e8b98f2cdc 100644
--- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
+++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
@@ -30,6 +30,9 @@  properties:
       - items:
           - const: fsl,imx8dxl-ddr-pmu
           - const: fsl,imx8-ddr-pmu
+      - items:
+          - const: fsl,imx95-ddr-pmu
+          - const: fsl,imx93-ddr-pmu
 
   reg:
     maxItems: 1