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Box" To: mika.westerberg@linux.intel.com, david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com, bhelgaas@google.com, rjw@rjwysocki.net Cc: tasev.stefanoska@skynet.be, enriquezmark36@gmail.com, kernel@witt.link, wse@tuxedocomputers.com, vidyas@nvidia.com, kai.heng.feng@canonical.com, sathyanarayanan.kuppuswamy@linux.intel.com, ricky_wu@realtek.com, mario.limonciello@amd.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] PCI: Move pci_save/restore_ltr_state() to aspm.c Date: Sun, 28 Jan 2024 15:32:11 -0800 Message-Id: <20240128233212.1139663-5-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240128233212.1139663-1-david.e.box@linux.intel.com> References: <20240128233212.1139663-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789388265837780168 X-GMAIL-MSGID: 1789388265837780168 Since the LTR Capability is linked with ASPM and only enabled when CONFIG_PCIEASPM is set, move the save/restore code to aspm.c Suggested-by: Bjorn Helgaas Signed-off-by: David E. Box --- drivers/pci/pci.c | 40 ---------------------------------------- drivers/pci/pci.h | 2 ++ drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+), 40 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0a8613e77dab..61e56e040510 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1636,46 +1636,6 @@ static void pci_restore_pcix_state(struct pci_dev *dev) pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]); } -static void pci_save_ltr_state(struct pci_dev *dev) -{ - int ltr; - struct pci_cap_saved_state *save_state; - u32 *cap; - - if (!pci_is_pcie(dev)) - return; - - ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); - if (!ltr) - return; - - save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state) { - pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n"); - return; - } - - /* Some broken devices only support dword access to LTR */ - cap = &save_state->cap.data[0]; - pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap); -} - -static void pci_restore_ltr_state(struct pci_dev *dev) -{ - struct pci_cap_saved_state *save_state; - int ltr; - u32 *cap; - - save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); - ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state || !ltr) - return; - - /* Some broken devices only support dword access to LTR */ - cap = &save_state->cap.data[0]; - pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap); -} - /** * pci_save_state - save the PCI configuration space of a device before * suspending diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 7b14cdbe2e69..98f54b48f013 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -100,6 +100,8 @@ void pci_bridge_d3_update(struct pci_dev *dev); void pci_aspm_get_l1ss(struct pci_dev *pdev); void pci_save_aspm_state(struct pci_dev *pdev); void pci_restore_aspm_state(struct pci_dev *pdev); +void pci_save_ltr_state(struct pci_dev *dev); +void pci_restore_ltr_state(struct pci_dev *dev); int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type); static inline void pci_wakeup_event(struct pci_dev *dev) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 3185058e9c41..f7712d8453a4 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -155,6 +155,46 @@ void pci_restore_aspm_state(struct pci_dev *pdev) pcie_capability_set_word(pdev, PCI_EXP_LNKCTL, val); } +void pci_save_ltr_state(struct pci_dev *dev) +{ + int ltr; + struct pci_cap_saved_state *save_state; + u32 *cap; + + if (!pci_is_pcie(dev)) + return; + + ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); + if (!ltr) + return; + + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); + if (!save_state) { + pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n"); + return; + } + + /* Some broken devices only support dword access to LTR */ + cap = &save_state->cap.data[0]; + pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap); +} + +void pci_restore_ltr_state(struct pci_dev *dev) +{ + struct pci_cap_saved_state *save_state; + int ltr; + u32 *cap; + + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); + ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); + if (!save_state || !ltr) + return; + + /* Some broken devices only support dword access to LTR */ + cap = &save_state->cap.data[0]; + pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap); +} + #ifdef CONFIG_PCIEASPM #ifdef MODULE_PARAM_PREFIX