From patchwork Sat Jan 27 16:17:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 193043 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2395:b0:106:343:edcb with SMTP id gw21csp566042dyb; Sat, 27 Jan 2024 08:22:06 -0800 (PST) X-Google-Smtp-Source: AGHT+IH8bTopevs1iihv1Hu3P9XqNWpzhGDsL11LQxrX7TMGtwj1VWENL1ng0qpATUH0IwDPXath X-Received: by 2002:a05:6a21:8312:b0:19a:3e20:372a with SMTP id oy18-20020a056a21831200b0019a3e20372amr1531357pzb.119.1706372525863; Sat, 27 Jan 2024 08:22:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706372525; cv=pass; d=google.com; s=arc-20160816; b=S1rDSsuZ7drZ0AXlgxR/cq1YLzVAA1DxpCH9eWRtLyd9NbqxAEwbSjJbKsOHw028ts ruTpp8BOKJa+4nNuiiD8HPFAyNACd3JJ2Yz8r0DkdwAu5k4NI9Ajs3m7atrqgLxyOWyE N5ZTCxec1WZK/9nVVe/HiRrkHeoW3+vgq+UkHBu0WdAgoPGkM2eFrOiJ/sjRd215SENj Zi4orT6bfw5KWrI8ye5d0hbWOT6fRZsLDSV8WxAJc+s4YAYbsmskzZsmqIa3X07lYGGR hjzHasZLESZYIDG5S1kqQgrzo/fIkHha4+sgQ2thmdU+56wB3HFD9awjrKVe40ebBN2A 8TCg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=LEJHdx6IO6bkVVTImbulpm/taR3P8DZhF8xpLu8rn5g=; fh=706cnY5t7hpwBXQypCTGH3HYLPe+/lcVAB5kbpxvl24=; b=or3pRkYKN6Y+8PDSApQkY9MifZ5Z3vxmOrGZDzsnE5YmiVpxpgLwsSvFveO/ds9PaU X115Ce/yuxZ05QeWmciDKvXMPA/iRPKDUnmLakvqYqfJ1IH2e+/4pH90O2u3o7gWkQ4q zPC2cmA7GASpCailMQhDJr2S60jkIl2KeUE0dZ/U9ugxAoAS5qwNiCEsULAiFaDc+DtP G0F+rG22Fus4eWc09dlXHzAEDfHkP54K3tNdSwWTYYeC95doxHXmF5OFck6c46CQFYW5 QI56p0wGacqL2cr2nFaN4YUHzc96ItNwJyKlgIXJnKi9Tek8zSxQWSASTbBL6p49txr9 n97g== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=XBvviF9v; arc=pass (i=1 spf=pass spfdomain=ventanamicro.com dkim=pass dkdomain=ventanamicro.com); spf=pass (google.com: domain of linux-kernel+bounces-41285-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-41285-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id l71-20020a63884a000000b005d576171e6asi2888744pgd.112.2024.01.27.08.22.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Jan 2024 08:22:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-41285-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=XBvviF9v; arc=pass (i=1 spf=pass spfdomain=ventanamicro.com dkim=pass dkdomain=ventanamicro.com); spf=pass (google.com: domain of linux-kernel+bounces-41285-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-41285-ouuuleilei=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 977FF2849E8 for ; Sat, 27 Jan 2024 16:22:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4D85845BF0; Sat, 27 Jan 2024 16:19:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="XBvviF9v" Received: from mail-pj1-f53.google.com (mail-pj1-f53.google.com [209.85.216.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60AFB45944 for ; Sat, 27 Jan 2024 16:19:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706372362; cv=none; b=WVI4QR2JIMWNKiTAgfFB7nEoKYr3XGFexvuyZYrIJUZNXPbtcP4OfYqridAwzzjNhMvW44xKT7/WJ4XLrt7dMxYwsAvG++9X0NJWF5RBpP4edNRhqDYNQGxaFsCxbdRj2piPQfUCQ86PJHZiCtoEGECEi/evxkvWpOEtpRi8wio= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706372362; c=relaxed/simple; bh=Z0bsXyy/eyFNkb57963VO9376500pOd5o0/Yx1fXsWY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qu/sfL+cs6cIWT0+1siktga7lFp6iYIpm8QHAz2YZl7yEvad2ZZbma0ueDkZIsAdMLyCmdUtYtzQxZvJNQ8c5VRy5K4z654JqQvh5nKoy5dyZc9IHB9G1+XXf5bLM/gClREGE9sv0VN7xjljESSFYMIcchKGf0MuZwq+zcVPEUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=XBvviF9v; arc=none smtp.client-ip=209.85.216.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pj1-f53.google.com with SMTP id 98e67ed59e1d1-2954b34ddd0so83947a91.0 for ; Sat, 27 Jan 2024 08:19:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1706372361; x=1706977161; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LEJHdx6IO6bkVVTImbulpm/taR3P8DZhF8xpLu8rn5g=; b=XBvviF9vR8CDy+tyYmsv6RACy2gCSNoCBOoie0NgDOqClzp2DSu7zuppiODXIucUuf MdWkismK3jtupDved9obhsBkUJd5oN4PEPDnhQkTLuQDZohfynpqNr/J0gXxcBmrYo2Z 7Rr69WFk25Xsp4BwG+JNRLuFYBFloG7t6YQ9kNf3wfysEB14BovhN18XvH3BfEH4Xik2 kUG+/kZRjEyvfSpg0VYpCnU7/A3tUbaM6Sl35M6NK5HIa5VD00XopiFiMmUsWI7wupPk 1Lt4sdpxLgcZAqZJi2UlnIE3J5cI43s7fT+4ia8zlH5m4YttLdz4/5yK9RNMUJMKycrv WGKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706372361; x=1706977161; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LEJHdx6IO6bkVVTImbulpm/taR3P8DZhF8xpLu8rn5g=; b=JqR1wOzEKFyHU+NmRJU+EKlCr9GH6wc/CzIemySr/9ysCq0Gg3XzeI0CSPANpEq1DG qTCEf1NjUhsAtbV1GH7NKe3+hsWJoWlQF+NCx1ULodkBkV/iZoy2oaowHQ1UohHodBGT gzLNKIzHppJOtUDC7NfvEkDdHSn2eBTWOXY/0UeKfSM4yISArD+5cE9ie/rihQdqbuLs ykXqbsJsvg5IDg154K2465jUDMrS3QSfBjBPkeT96HBJgkHBAM0XBw6tFa2jLco2I3zM 1kcng8kqpVFIpOyOkSsUldSzTYPfKTIm+v5CEZaNt74kTPGLB6+d5lXkUuHRdMXRAuw6 tLtA== X-Gm-Message-State: AOJu0YywrPC8/myhxQ05L3xVQo8ZYxuVScEBnqz2baUislT0zAGfQUme sMhUGqUFohuvMzhhw8GYOqrc2MxTSBIt8DaLfvTjQL7G7ba7YCA/PDKUI7xu6BM= X-Received: by 2002:a17:90a:780f:b0:293:d89e:349b with SMTP id w15-20020a17090a780f00b00293d89e349bmr1219751pjk.57.1706372360712; Sat, 27 Jan 2024 08:19:20 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.86.17]) by smtp.gmail.com with ESMTPSA id d11-20020a17090ac24b00b00290f8c708d0sm5091620pjx.57.2024.01.27.08.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Jan 2024 08:19:20 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts Date: Sat, 27 Jan 2024 21:47:39 +0530 Message-Id: <20240127161753.114685-12-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240127161753.114685-1-apatel@ventanamicro.com> References: <20240127161753.114685-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789261277375851427 X-GMAIL-MSGID: 1789261277375851427 From: Thomas Gleixner To support wire to MSI bridges proper in the MSI core infrastructure it is required to have separate allocation/free interfaces which can be invoked from the regular irqdomain allocaton/free functions. The mechanism for allocation is: - Allocate the next free MSI descriptor index in the domain - Store the hardware interrupt number and the trigger type which was extracted by the irqdomain core from the firmware spec in the MSI descriptor device cookie so it can be retrieved by the underlying interrupt domain and interrupt chip - Use the regular MSI allocation mechanism for the newly allocated index which returns a fully initialized Linux interrupt on succes This works because: - the domains have a fixed size - each hardware interrupt is only allocated once - the underlying domain does not care about the MSI index it only cares about the hardware interrupt number and the trigger type The free function looks up the MSI index in the MSI descriptor of the provided Linux interrupt number and uses the regular index based free functions of the MSI core. Signed-off-by: Thomas Gleixner Signed-off-by: Anup Patel --- include/linux/irqdomain.h | 17 ++++++++++ kernel/irq/msi.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index ee0a82c60508..21ecf582a0fe 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -619,6 +619,23 @@ static inline bool irq_domain_is_msi_device(struct irq_domain *domain) #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ +#ifdef CONFIG_GENERIC_MSI_IRQ +int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, + unsigned int type); +void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq); +#else +static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, + unsigned int type) +{ + WARN_ON_ONCE(1); + return -EINVAL; +} +static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq) +{ + WARN_ON_ONCE(1); +} +#endif + #else /* CONFIG_IRQ_DOMAIN */ static inline void irq_dispose_mapping(unsigned int virq) { } static inline struct irq_domain *irq_find_matching_fwnode( diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c index 5289fc2c7630..07e9daaf0657 100644 --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -1540,6 +1540,50 @@ struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, u return map; } +/** + * msi_device_domain_alloc_wired - Allocate a "wired" interrupt on @domain + * @domain: The domain to allocate on + * @hwirq: The hardware interrupt number to allocate for + * @type: The interrupt type + * + * This weirdness supports wire to MSI controllers like MBIGEN. + * + * @hwirq is the hardware interrupt number which is handed in from + * irq_create_fwspec_mapping(). As the wire to MSI domain is sparse, but + * sized in firmware, the hardware interrupt number cannot be used as MSI + * index. For the underlying irq chip the MSI index is irrelevant and + * all it needs is the hardware interrupt number. + * + * To handle this the MSI index is allocated with MSI_ANY_INDEX and the + * hardware interrupt number is stored along with the type information in + * msi_desc::cookie so the underlying interrupt chip and domain code can + * retrieve it. + * + * Return: The Linux interrupt number (> 0) or an error code + */ +int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, + unsigned int type) +{ + unsigned int domid = MSI_DEFAULT_DOMAIN; + union msi_instance_cookie icookie = { }; + struct device *dev = domain->dev; + struct msi_map map = { }; + + if (WARN_ON_ONCE(!dev || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI)) + return -EINVAL; + + icookie.value = ((u64)type << 32) | hwirq; + + msi_lock_descs(dev); + if (WARN_ON_ONCE(msi_get_device_domain(dev, domid) != domain)) + map.index = -EINVAL; + else + map = __msi_domain_alloc_irq_at(dev, domid, MSI_ANY_INDEX, NULL, &icookie); + msi_unlock_descs(dev); + + return map.index >= 0 ? map.virq : map.index; +} + static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain, struct msi_ctrl *ctrl) { @@ -1665,6 +1709,30 @@ void msi_domain_free_irqs_all(struct device *dev, unsigned int domid) msi_unlock_descs(dev); } +/** + * msi_device_domain_free_wired - Free a wired interrupt in @domain + * @domain: The domain to free the interrupt on + * @virq: The Linux interrupt number to free + * + * This is the counterpart of msi_device_domain_alloc_wired() for the + * weird wired to MSI converting domains. + */ +void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq) +{ + struct msi_desc *desc = irq_get_msi_desc(virq); + struct device *dev = domain->dev; + + if (WARN_ON_ONCE(!dev || !desc || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI)) + return; + + msi_lock_descs(dev); + if (!WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) { + msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index, + desc->msi_index); + } + msi_unlock_descs(dev); +} + /** * msi_get_domain_info - Get the MSI interrupt domain info for @domain * @domain: The interrupt domain to retrieve data from