From patchwork Fri Jan 26 22:38:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nam Cao X-Patchwork-Id: 192836 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2395:b0:106:343:edcb with SMTP id gw21csp190125dyb; Fri, 26 Jan 2024 14:39:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IEK5gYegec4/d0AIVwtRrQMdBvcLY27I6v0RWuYLAGAkywldur0CYAGv4f/NrtdhdJqZ0e2 X-Received: by 2002:a17:90a:7e93:b0:28e:2294:78b6 with SMTP id j19-20020a17090a7e9300b0028e229478b6mr547601pjl.82.1706308770881; Fri, 26 Jan 2024 14:39:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706308770; cv=pass; d=google.com; s=arc-20160816; b=gWdWgdCqlhv34KNjvMF43nF2R7/yMlpxJ6G7ND2TleGtL70vnsa6l9IPqJslICXn/e ICb9Z7AcCgDnnqBXkm9tbgGvnq9JQMtlWibsO5IKuKn6SXhSzSNlulZ9axwZ/bQcmwSi uAPv/XgCzrYT7A/6MWJ3TvoGlTPCVPncpTKD6+TSWGldOFLp/LNZA+NbZs0aVE+t1DjH 7R5Xl1IyascTBP2bCLCJoE2NAqmjrvSIK0+ZU7/vQy5FM9pNNopHS0k6cJ6JOqL6C7Lu 9gFRrf58mZJvJCDQVSxHHkygTlM4tubxU5RHY4ddtS9r9Pq7wKUWAPbWYZicwzd0XPPe xT5Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:message-id:date:subject:cc:to :dkim-signature:dkim-signature:from; bh=OSY4AA+ERuahWut+3rNr0L68f8wAh2tNR3brI8MYRrg=; fh=XdrQO0naFMyKJMAKFcVzQ0ge1P7yoKPVxrP31iIwRtE=; b=IAQRd+5DYCG5sL0RKLsUea2lqBAgaQbmajim0n1istp112PNKdNLfBwkFCE3AHfkst iEOP/4IrxWHOMSmx+1MrBBDfE8iuvcFglm6tqncKzJvGV2vwWlJ7FkU+t1tPLn5fNKXh 2lkzGXzkX/GP6C+HuuuknGXB70XNeSQb/8Zicq7IYc3MycDy8D62T8dllrBVOMURcsEm 39DG9lQfiRwelLpiWdYzBEa5pCDCX5c9DNI0eEoDASgDt5e++0GQoqoMtnCjuQ60xoWy myC/AZf14RgtMOlKjovhPWRZRsDP9kIl1HvSRHlOwevzeSFC1WT5lS+eHQyKZ1hiSfzc gZ9w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=1sr8VWzT; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-40784-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-40784-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id mr21-20020a17090b239500b002903e32edb8si3760367pjb.171.2024.01.26.14.39.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 14:39:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-40784-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=1sr8VWzT; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-40784-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-40784-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 8F2D02840D2 for ; Fri, 26 Jan 2024 22:39:30 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4F37550A9B; Fri, 26 Jan 2024 22:38:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="1sr8VWzT"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="l9Kmcghk" Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63C0733CC5; Fri, 26 Jan 2024 22:38:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706308729; cv=none; b=SMpR7miA2wd+XyvxitJoj+yG/DT2+55hCdoB8b6OpkZtjhwUqngTnZ405E7kDsMBbs3rXkpVI1CBi6zNvdnD63js79Okj2zbzoZdmMiUx0HeOOmYI8DnjQDoeHfkZ/C1BwLvUP5oTlmtoLLbYuB6LUbZONC70N5zzqdqkMm2nP4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706308729; c=relaxed/simple; bh=7lOWwXH/WRFuWZZ/p5u1Sz60O9F39LLJNZyVUA3JD44=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=CA537AMFbV4ty21maE4QrerW9+rlxIwn7w54GdjsvtbjzNvJO5gVKfK1OAOheD9rHm5mTYqNlrACKLpaecgYkZcIrH523YwTLH4oQw0SxMI31QuqlTZnrkj/EBAVf7Re5iDlKY1AHpeQYsjj4DzeqLxMSQE4lkSm/XmcvHBv+o8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=1sr8VWzT; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=l9Kmcghk; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1706308724; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=OSY4AA+ERuahWut+3rNr0L68f8wAh2tNR3brI8MYRrg=; b=1sr8VWzT31KeAk/uxoLKrfRKmZYe7u1SQ2lRSdKhorNCv8KuQb2ac+WiA+rU640ICqiHVz MT9Guulw72qEjtqkIj59AMaBGQI3SNlz7QEBWSWIv3MsVB/uZgEixpj5wGfIBF6lsizh48 NJFxBLhROuxlA1jdLxcZlBc7rXEVGRPvNtly5Hr6RgPkWNHRrSi8+kEXGSUBQ1sOqIh/l2 w3/Kb+RaT0mf+FDBy4Rnm46U5iU1oQEcq+nwi1uwciWbwpNn9jY23/roTwmGvri8BbQzCE zNW1CK278k3vLEQsES8FSF97ayjNN0JdBKBZ48ZOiSQQzfm3xZIhDSrP1PqlNQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1706308724; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=OSY4AA+ERuahWut+3rNr0L68f8wAh2tNR3brI8MYRrg=; b=l9KmcghkgmsXMiSYrpdPPTa025ZNvFZoX4I8GVfWpFJMzjE0wzCv9aH+u7puAYNVVVNjAU JqC+GlJvjpaRqvCA== To: Thomas Gleixner , Palmer Dabbelt , Paul Walmsley , Samuel Holland , Marc Zyngier , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Cc: Nam Cao , stable@vger.kernel.org Subject: [PATCH] irqchip/sifive-plic: enable interrupt if needed before EOI Date: Fri, 26 Jan 2024 23:38:36 +0100 Message-Id: <20240126223836.202321-1-namcao@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789194426109608217 X-GMAIL-MSGID: 1789194426109608217 RISC-V PLIC cannot EOI disabled interrupts, as explained in the description of Interrupt Completion in the PLIC spec: "The PLIC signals it has completed executing an interrupt handler by writing the interrupt ID it received from the claim to the claim/complete register. The PLIC does not check whether the completion ID is the same as the last claim ID for that target. If the completion ID does not match an interrupt source that *is currently enabled* for the target, the completion is silently ignored." Commit 69ea463021be ("irqchip/sifive-plic: Fixup EOI failed when masked") ensured that by enabling the interrupt if needed before EOI. Commit a1706a1c5062 ("irqchip/sifive-plic: Separate the enable and mask operations") removed the interrupt enabling code from the previous commit, because it assumes that interrupt should be enabled at the point of EOI. However, this is incorrect: there is a small window after a hart claiming an interrupt and before irq_desc->lock getting acquired, interrupt can be disabled during this window. Thus, EOI can be invoked while the interrupt is disabled, effectively nullify this EOI. Make sure that interrupt is really enabled before EOI. Fixes: a1706a1c5062 ("irqchip/sifive-plic: Separate the enable and mask operations") Cc: Signed-off-by: Nam Cao --- drivers/irqchip/irq-sifive-plic.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 5b7bc4fd9517..0857a516c35b 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -148,7 +148,13 @@ static void plic_irq_eoi(struct irq_data *d) { struct plic_handler *handler = this_cpu_ptr(&plic_handlers); - writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + if (irqd_irq_disabled(d)) { + plic_toggle(handler, d->hwirq, 1); + writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + plic_toggle(handler, d->hwirq, 0); + } else { + writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + } } #ifdef CONFIG_SMP