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[1/4] arm64: dts: ti: k3-j7200: Enable PCIe nodes at the board level

Message ID 20240124183659.149119-1-afd@ti.com
State New
Headers
Series [1/4] arm64: dts: ti: k3-j7200: Enable PCIe nodes at the board level |

Commit Message

Andrew Davis Jan. 24, 2024, 6:36 p.m. UTC 
  PCIe node defined in the top-level J7200 SoC dtsi file is incomplete
and will not be functional unless it is extended with a SerDes PHY.

As the PHY and mode is only known at the board integration level, this
node should only be enabled when provided with this information.

Disable the PCIe node in the dtsi files and only enable when it is
actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 1 +
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi             | 1 +
 2 files changed, 2 insertions(+)

Comments

Vignesh Raghavendra Feb. 6, 2024, 4:41 a.m. UTC | #1 
Hi Andrew Davis,

On Wed, 24 Jan 2024 12:36:56 -0600, Andrew Davis wrote:
> PCIe node defined in the top-level J7200 SoC dtsi file is incomplete
> and will not be functional unless it is extended with a SerDes PHY.
> 
> As the PHY and mode is only known at the board integration level, this
> node should only be enabled when provided with this information.
> 
> Disable the PCIe node in the dtsi files and only enable when it is
> actually pinned out on a given board.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/4] arm64: dts: ti: k3-j7200: Enable PCIe nodes at the board level
      commit: 1b63a1b480c27764d30a0924a4982d31e15df6fd
[2/4] arm64: dts: ti: k3-j7200: Remove PCIe endpoint node
      commit: 0b16abe711bd5136f2319c4f548fb20588540266
[3/4] arm64: dts: ti: k3-am65: Remove PCIe endpoint nodes
      commit: e074d9d9a52eec11cd8b3f98e2576b0c762686f1
[4/4] arm64: dts: ti: k3-am64: Remove PCIe endpoint node
      commit: 6cce60550763564360beadf57ecf2e4d45b585e1

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index cee2b4b0eb87d..7e4fd7ab9750c 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -382,6 +382,7 @@  serdes0_qsgmii_link: phy@1 {
 };
 
 &pcie1_rc {
+	status = "okay";
 	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
 	phys = <&serdes0_pcie_link>;
 	phy-names = "pcie-phy";
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index da67bf8fe703e..1e2434caa7ffa 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -770,6 +770,7 @@  pcie1_rc: pcie@2910000 {
 		ranges = <0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000>,
 			 <0x02000000 0x0 0x18011000  0x00 0x18011000  0x0 0x7fef000>;
 		dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
+		status = "disabled";
 	};
 
 	pcie1_ep: pcie-ep@2910000 {