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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by SN1PEPF0002636C.mail.protection.outlook.com (10.167.241.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7202.16 via Frontend Transport; Wed, 24 Jan 2024 02:54:05 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Tue, 23 Jan 2024 20:54:04 -0600 Received: from xsjanatoliy50.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.34 via Frontend Transport; Tue, 23 Jan 2024 20:54:04 -0600 From: Anatoliy Klymenko To: , , , , , , , , , Subject: [PATCH v3 1/5] drm: xlnx: zynqmp_dpsub: Make drm bridge discoverable Date: Tue, 23 Jan 2024 18:53:58 -0800 Message-ID: <20240124025402.373620-2-anatoliy.klymenko@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240124025402.373620-1-anatoliy.klymenko@amd.com> References: <20240124025402.373620-1-anatoliy.klymenko@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636C:EE_|CH2PR12MB4938:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e32c268-01e2-4c48-a3c6-08dc1c87bac1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jan 2024 02:54:05.8558 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e32c268-01e2-4c48-a3c6-08dc1c87bac1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4938 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788939470252749841 X-GMAIL-MSGID: 1788939470252749841 ZynqMP DPSUB supports 2 input modes: DMA based and live video. In the first mode, the driver implements CRTC and DP encoder DRM bridge to model the complete display pipeline. In this case, DRM bridge is being directly instantiated within the driver, not using any bridge discovery mechanisms. In the live video input mode video signal is generated by FPGA fabric and passed into DPSUB over the connected bus. In this mode driver exposes the DP encoder as a DRM bridge, expecting external CRTC to discover it via drm_of_find_panel_or_bridge() or a similar call. This discovery relies on drm_bridge.of_node being properly set. Assign device OF node to the bridge prior to registering it. This will make said bridge discoverable by an external CRTC driver. Reviewed-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Signed-off-by: Anatoliy Klymenko --- drivers/gpu/drm/xlnx/zynqmp_dp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index a0606fab0e22..d60b7431603f 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -1721,6 +1721,7 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) bridge->ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; bridge->type = DRM_MODE_CONNECTOR_DisplayPort; + bridge->of_node = dp->dev->of_node; dpsub->bridge = bridge; /*