Message ID | 20240118112739.2000497-2-dawei.li@shingroup.cn |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2bc4:b0:101:a8e8:374 with SMTP id hx4csp274301dyb; Thu, 18 Jan 2024 03:30:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IEgJ5h+QtmPZmjLK3SP4Q5lMIZKyRk1rJ+qx3Im0A/+v+eA/c894qghKDMqitVcKdWYT5Qm X-Received: by 2002:ac8:58c8:0:b0:42a:1c6d:9dea with SMTP id u8-20020ac858c8000000b0042a1c6d9deamr486194qta.103.1705577418495; Thu, 18 Jan 2024 03:30:18 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1705577418; cv=pass; d=google.com; s=arc-20160816; b=PySYVZPYVmFtLTabLym/uUCuymj54nz0k4Buz2/MwLgt+oa5xf1ojvMqC6fQBEq4h8 yMWaImcD4x2sFmn1BDX4AjUswZSgur9Es7ah0nmhZt8gnZmMm46f/7z0e4QXQq79dbVO UBvnSUf8QFscSOR0oLDDLeIitvQJCvpCbfHVUXpJNpe7tRjqDtwELzPGzIOiKuSvt81d KHWsXzf2yIdbwXMxUYTDzHKxY6IsoT7HQeDfSmn11I3wjnQ+pCK7TJ/2I/O3K8N+/0rO rCPHSBw30slzuycS6+ydHvkpPcwLsnMOnbnMRAIku1HMXIOM6b5P6vblh3JeA1nyfYjZ PHAA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=feedback-id:content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from; bh=5v8SMtbN4Hey6E3EG79cWNy67FO04ey18KWowlZqpnE=; fh=fhl29VgcwdOsneTlbOdSMck1eQdlOQed/8OKKjpLkTo=; b=hyE7tThTFB0oqCzOzyeTVQI4LPtZbjRifn0c54aU1BfVe/Yh2Zkc67EInZZTYWAW4t RsMzAndiTASYHchIel8AmgsiU9JBuYvarPKfCk65LSUKfn53o2TKEm83xZ/dBEKVKHPS YOunqdVplByPlbAdTOz+AQVi5LaonktL/DhCX8QPUHE2+wUxsW8BKrpRLR81j/KXBCYp GgswQFWho7093vXMhjKlrE8Civ6yu5oIb++EiV34f/ZIgiQ7kXptC3L8pBcxEFjfVnin wokY0mt6pzQxWuDY2PVq+DS6u8j6bvOQuSuCP3nAW8Ng7ZeU/OSqwZQKssiMd3IdzqAS cOYQ== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=shingroup.cn dmarc=pass fromdomain=shingroup.cn); spf=pass (google.com: domain of linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=shingroup.cn Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [147.75.199.223]) by mx.google.com with ESMTPS id z16-20020a05622a029000b0042a095629c7si4310105qtw.486.2024.01.18.03.30.18 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jan 2024 03:30:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=shingroup.cn dmarc=pass fromdomain=shingroup.cn); spf=pass (google.com: domain of linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-30052-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=shingroup.cn Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 482901C20385 for <ouuuleilei@gmail.com>; Thu, 18 Jan 2024 11:30:18 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1259424A16; Thu, 18 Jan 2024 11:30:02 +0000 (UTC) Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F746241E6 for <linux-kernel@vger.kernel.org>; Thu, 18 Jan 2024 11:29:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.204.34.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705577400; cv=none; b=rfN+v0reGB+9DCp6x+FDufiYyKfSvGCfbKGGvwPDrlxQVsExRA10PgBPCdYAF9MuX3onpTA7f7Wm89Mgb08y2hsWag7N9b+LqirspksjpxUUo/UsYJB3c7ZR6L5G5Jyg6eNuwoPttHKHMi/S4Zkwr26QocWeUiFtDybAy0QknMs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705577400; c=relaxed/simple; bh=mxbFnAWvYxONRJamr2rRROrpwNYKGzQx7a4/fqyrHh0=; h=X-QQ-mid:X-QQ-Originating-IP:Received:X-QQ-SSF:X-QQ-FEAT: X-QQ-GoodBg:X-BIZMAIL-ID:From:To:Cc:Subject:Date:Message-Id: X-Mailer:In-Reply-To:References:MIME-Version: Content-Transfer-Encoding:X-QQ-SENDSIZE:Feedback-ID; b=Q6jQxx//thS5dm6Q54ev5JFl/tyR1puS3aVUoglB8v7PeL0ZEIvu5kIlrcBivFgejgitUJ3wgxxvPeWKJs/xkL7Ne72hxCRS+Q5/jDaebZZfHJ+3v5jxo+2tO8Wez9P2y2eQNzOtW/6tWGuN9Oot8P+MmBdId7UbN3+CMp1Bj1o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=shingroup.cn; spf=pass smtp.mailfrom=shingroup.cn; arc=none smtp.client-ip=54.204.34.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=shingroup.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=shingroup.cn X-QQ-mid: bizesmtp83t1705577367t5i7m3uq X-QQ-Originating-IP: crRyA8ASh2OZBJ3ZtqXMJ8f2PolwNAW2z3CcI2liUJg= Received: from localhost ( [183.209.108.228]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 18 Jan 2024 19:29:26 +0800 (CST) X-QQ-SSF: 01400000000000504000000K0000000 X-QQ-FEAT: 96k0+YG2NiUznyX94RbUHJpQca5nJHiVw3v/7rb0ObtAxL1zT+7AZvIDS6qax CtGWYvYzEOpSw+2fV9y788JzdrVqR2hCdzRe05f4uvl6R8WRScmCN/qmJ0LQHEfBXzrO/MO Wd1W+YkNl0uDHNtCOyqgKdmrXzrT6fqhRnnu5a3Y73uL4KGjt67XVEu7eStsFF81HYqScWm UMecbrWl3WOr2aMS2K1RxOEGDJ1oMqujYrbWQpU++cPki6u25hQNsl61YBrJ2IplPlhQFmX ebU3AoVHY0l+vyIQGcsOQRjhCWS+pMHIIJY2LHQr4Cp/llgC2H16hrbLPk+vRP0XEpdVFUu IAN8M2pWunXibDeq1qzSvQI1zbV49eq6eK9YQjITwCY77dzLSJP4CeoudyeqkHSeDu0+viO koKhjmwrWAU= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 4984385950916111259 From: Dawei Li <dawei.li@shingroup.cn> To: tglx@linutronix.de, maz@kernel.org Cc: sdonthineni@nvidia.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dawei.li@shingroup.cn, set_pte_at@outlook.com Subject: [PATCH 1/4] irqchip/gic-v3: Implement read polling with dedicated API Date: Thu, 18 Jan 2024 19:27:36 +0800 Message-Id: <20240118112739.2000497-2-dawei.li@shingroup.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20240118112739.2000497-1-dawei.li@shingroup.cn> References: <20240118112739.2000497-1-dawei.li@shingroup.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:shingroup.cn:qybglogicsvrgz:qybglogicsvrgz5a-1 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788427547159154404 X-GMAIL-MSGID: 1788427547159154404 |
Series |
Minor cleanup on gic(v3) and genirq
|
|
Commit Message
Dawei Li
Jan. 18, 2024, 11:27 a.m. UTC
Kernel provide read*_poll_* API family to support looping based polling
code pattern like below:
while (...)
{
val = op(addr);
condition = cond(val);
if (condition)
break;
/* Maybe some timeout handling stuff */
cpu_relax();
udelay();
}
As such, use readl_relaxed_poll_timeout_atomic() to implement atomic
register polling logic in gic-v3.
Signed-off-by: Dawei Li <dawei.li@shingroup.cn>
---
drivers/irqchip/irq-gic-v3.c | 27 ++++++++-------------------
1 file changed, 8 insertions(+), 19 deletions(-)
Comments
On Thu, 18 Jan 2024 11:27:36 +0000, Dawei Li <dawei.li@shingroup.cn> wrote: > > Kernel provide read*_poll_* API family to support looping based polling > code pattern like below: > while (...) > { > val = op(addr); > condition = cond(val); > if (condition) > break; > > /* Maybe some timeout handling stuff */ > > cpu_relax(); > udelay(); > } > > As such, use readl_relaxed_poll_timeout_atomic() to implement atomic > register polling logic in gic-v3. > > Signed-off-by: Dawei Li <dawei.li@shingroup.cn> > --- > drivers/irqchip/irq-gic-v3.c | 27 ++++++++------------------- > 1 file changed, 8 insertions(+), 19 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index 98b0329b7154..b9d9375a3434 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -19,6 +19,7 @@ > #include <linux/percpu.h> > #include <linux/refcount.h> > #include <linux/slab.h> > +#include <linux/iopoll.h> > > #include <linux/irqchip.h> > #include <linux/irqchip/arm-gic-common.h> > @@ -251,17 +252,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d) > > static void gic_do_wait_for_rwp(void __iomem *base, u32 bit) > { > - u32 count = 1000000; /* 1s! */ > + u32 val; > > - while (readl_relaxed(base + GICD_CTLR) & bit) { > - count--; > - if (!count) { > - pr_err_ratelimited("RWP timeout, gone fishing\n"); > - return; > - } > - cpu_relax(); > - udelay(1); > - } > + if (readl_relaxed_poll_timeout_atomic(base + GICD_CTLR, > + val, !(val & bit), 1, 1000000) == -ETIMEDOUT) If you are doing this, please use a constant such as USEC_PER_SEC for the timeout. And fix the alignment of the second line so that the parameters are aligned vertically. > + pr_err_ratelimited("RWP timeout, gone fishing\n"); > } > > /* Wait for completion of a distributor change */ > @@ -279,7 +274,6 @@ static void gic_redist_wait_for_rwp(void) > static void gic_enable_redist(bool enable) > { > void __iomem *rbase; > - u32 count = 1000000; /* 1s! */ > u32 val; > > if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996) > @@ -301,14 +295,9 @@ static void gic_enable_redist(bool enable) > return; /* No PM support in this redistributor */ > } > > - while (--count) { > - val = readl_relaxed(rbase + GICR_WAKER); > - if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep)) > - break; > - cpu_relax(); > - udelay(1); > - } > - if (!count) > + if (readl_relaxed_poll_timeout_atomic(rbase + GICR_WAKER, > + val, enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep), > + 1, 1000000) == -ETIMEDOUT) > pr_err_ratelimited("redistributor failed to %s...\n", > enable ? "wakeup" : "sleep"); > } Same thing here. M.
Hi Marc, Thanks for the quick review. On Thu, Jan 18, 2024 at 02:00:15PM +0000, Marc Zyngier wrote: > On Thu, 18 Jan 2024 11:27:36 +0000, > Dawei Li <dawei.li@shingroup.cn> wrote: > > > > Kernel provide read*_poll_* API family to support looping based polling > > code pattern like below: > > while (...) > > { > > val = op(addr); > > condition = cond(val); > > if (condition) > > break; > > > > /* Maybe some timeout handling stuff */ > > > > cpu_relax(); > > udelay(); > > } > > > > As such, use readl_relaxed_poll_timeout_atomic() to implement atomic > > register polling logic in gic-v3. > > > > Signed-off-by: Dawei Li <dawei.li@shingroup.cn> > > --- > > drivers/irqchip/irq-gic-v3.c | 27 ++++++++------------------- > > 1 file changed, 8 insertions(+), 19 deletions(-) > > > > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > > index 98b0329b7154..b9d9375a3434 100644 > > --- a/drivers/irqchip/irq-gic-v3.c > > +++ b/drivers/irqchip/irq-gic-v3.c > > @@ -19,6 +19,7 @@ > > #include <linux/percpu.h> > > #include <linux/refcount.h> > > #include <linux/slab.h> > > +#include <linux/iopoll.h> > > > > #include <linux/irqchip.h> > > #include <linux/irqchip/arm-gic-common.h> > > @@ -251,17 +252,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d) > > > > static void gic_do_wait_for_rwp(void __iomem *base, u32 bit) > > { > > - u32 count = 1000000; /* 1s! */ > > + u32 val; > > > > - while (readl_relaxed(base + GICD_CTLR) & bit) { > > - count--; > > - if (!count) { > > - pr_err_ratelimited("RWP timeout, gone fishing\n"); > > - return; > > - } > > - cpu_relax(); > > - udelay(1); > > - } > > + if (readl_relaxed_poll_timeout_atomic(base + GICD_CTLR, > > + val, !(val & bit), 1, 1000000) == -ETIMEDOUT) > > If you are doing this, please use a constant such as USEC_PER_SEC for > the timeout. And fix the alignment of the second line so that the > parameters are aligned vertically. Agreed, well defined constant is always preferable than magic number; And yes, alignment is for better readability. > > > + pr_err_ratelimited("RWP timeout, gone fishing\n"); > > } > > > > /* Wait for completion of a distributor change */ > > @@ -279,7 +274,6 @@ static void gic_redist_wait_for_rwp(void) > > static void gic_enable_redist(bool enable) > > { > > void __iomem *rbase; > > - u32 count = 1000000; /* 1s! */ > > u32 val; > > > > if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996) > > @@ -301,14 +295,9 @@ static void gic_enable_redist(bool enable) > > return; /* No PM support in this redistributor */ > > } > > > > - while (--count) { > > - val = readl_relaxed(rbase + GICR_WAKER); > > - if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep)) > > - break; > > - cpu_relax(); > > - udelay(1); > > - } > > - if (!count) > > + if (readl_relaxed_poll_timeout_atomic(rbase + GICR_WAKER, > > + val, enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep), > > + 1, 1000000) == -ETIMEDOUT) > > pr_err_ratelimited("redistributor failed to %s...\n", > > enable ? "wakeup" : "sleep"); > > } > > Same thing here. Ack. I will address two issues above and send respin of V2. Thanks, Dawei > > M. > > -- > Without deviation from the norm, progress is not possible. >
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 98b0329b7154..b9d9375a3434 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -19,6 +19,7 @@ #include <linux/percpu.h> #include <linux/refcount.h> #include <linux/slab.h> +#include <linux/iopoll.h> #include <linux/irqchip.h> #include <linux/irqchip/arm-gic-common.h> @@ -251,17 +252,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d) static void gic_do_wait_for_rwp(void __iomem *base, u32 bit) { - u32 count = 1000000; /* 1s! */ + u32 val; - while (readl_relaxed(base + GICD_CTLR) & bit) { - count--; - if (!count) { - pr_err_ratelimited("RWP timeout, gone fishing\n"); - return; - } - cpu_relax(); - udelay(1); - } + if (readl_relaxed_poll_timeout_atomic(base + GICD_CTLR, + val, !(val & bit), 1, 1000000) == -ETIMEDOUT) + pr_err_ratelimited("RWP timeout, gone fishing\n"); } /* Wait for completion of a distributor change */ @@ -279,7 +274,6 @@ static void gic_redist_wait_for_rwp(void) static void gic_enable_redist(bool enable) { void __iomem *rbase; - u32 count = 1000000; /* 1s! */ u32 val; if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996) @@ -301,14 +295,9 @@ static void gic_enable_redist(bool enable) return; /* No PM support in this redistributor */ } - while (--count) { - val = readl_relaxed(rbase + GICR_WAKER); - if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep)) - break; - cpu_relax(); - udelay(1); - } - if (!count) + if (readl_relaxed_poll_timeout_atomic(rbase + GICR_WAKER, + val, enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep), + 1, 1000000) == -ETIMEDOUT) pr_err_ratelimited("redistributor failed to %s...\n", enable ? "wakeup" : "sleep"); }