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Mon, 15 Jan 2024 13:15:17 -0800 From: To: , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v16 1/3] vfio/pci: rename and export do_io_rw() Date: Mon, 15 Jan 2024 21:15:14 +0000 Message-ID: <20240115211516.635852-2-ankita@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115211516.635852-1-ankita@nvidia.com> References: <20240115211516.635852-1-ankita@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA50:EE_|SJ2PR12MB9163:EE_ X-MS-Office365-Filtering-Correlation-Id: d96586ab-95a1-48c7-3d90-08dc160f1d51 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: prZ5K56ESu1/6Aau1pV5qRQyqNxdQXaNvrHoSo8f/XpjkCMpEVBOmnOjDdvsXFTKIViM3qe/bQeu+PQLsi7TfY8yD6G56sxvbeDGC2Pnd85XQvL85mSz2/BzEvFAS+3pmcgivv7ORPwReUhCM0HhpTUiUPt6lbvngzekZ6Dzb/yKGISqLJ5XFImeh2fVe319ZhMZgyWq6GvpUxJifFJcOoHgRlKvxNabeGWj4MVYsrftSydIPiLPUnTbsKlDYgIBa/4TJbo5IPfzfIIsZtljhUyEt0cfirZ6yGe77RMDmlhOFNzcCula4IXYmBBH6CiLUTdcbynAWL1FXl9oo2Sn82wv9tZYc6AZM/UCcpKRpGwzOlx2gk9MMv6+5DU6+fD9/78Mjh2r0rEw0lDh+JAltCKbYgtdVvsMXXudIFVFtAeBHwwAcgHKnymO+Joo53pV4D2x6xDzyWnYML6dhI34kZyab0psz+PX11EeL9M6yOyN84vAMKbiKQ4rNdLIg8+4BtUU+gDSm9FzD3l6y/gdId+LX+AGwK7cwyTde5URoIzLyx5ch1v0IO2MjEyQRy6jlRWnIz5mJtg1Z6WE6CT3/o2a51IMlG2ctGBOZAVNwdCnGmNp6rC+aqixTpN5qddGXCxQBTXfJwqMbJbRtjKiTylZi8Jv/od2KSdD/WzJ+aFXvsMl6m7mU+F8iFoQ2qFOgEaMcNRp4Qs7eEK8Z8oPH+saeDmvOnJkTTBxMLMROOc= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(346002)(136003)(396003)(376002)(230922051799003)(451199024)(186009)(82310400011)(1800799012)(64100799003)(36840700001)(46966006)(40470700004)(8676002)(4326008)(110136005)(70206006)(8936002)(5660300002)(70586007)(86362001)(54906003)(316002)(2876002)(2906002)(36756003)(47076005)(36860700001)(478600001)(6666004)(82740400003)(2616005)(7636003)(356005)(7696005)(83380400001)(26005)(426003)(336012)(41300700001)(1076003)(40480700001)(40460700003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jan 2024 21:15:35.0701 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d96586ab-95a1-48c7-3d90-08dc160f1d51 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA50.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9163 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788192626847125732 X-GMAIL-MSGID: 1788192626847125732 From: Ankit Agrawal do_io_rw() is used to read/write to the device MMIO. The grace hopper VFIO PCI variant driver require this functionality to read/write to its memory. Rename this as vfio_pci_core functions and export as GPL. Signed-off-by: Ankit Agrawal Tested-by: Ankit Agrawal --- drivers/vfio/pci/vfio_pci_rdwr.c | 16 +++++++++------- include/linux/vfio_pci_core.h | 5 ++++- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index e27de61ac9fe..15484e27b26f 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -94,10 +94,10 @@ VFIO_IOREAD(32) * reads with -1. This is intended for handling MSI-X vector tables and * leftover space for ROM BARs. */ -static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, - void __iomem *io, char __user *buf, - loff_t off, size_t count, size_t x_start, - size_t x_end, bool iswrite) +ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, + void __iomem *io, char __user *buf, + loff_t off, size_t count, size_t x_start, + size_t x_end, bool iswrite) { ssize_t done = 0; int ret; @@ -199,6 +199,7 @@ static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, return done; } +EXPORT_SYMBOL_GPL(vfio_pci_core_do_io_rw); static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) { @@ -276,8 +277,8 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, x_end = vdev->msix_offset + vdev->msix_size; } - done = do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos, - count, x_start, x_end, iswrite); + done = vfio_pci_core_do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos, + count, x_start, x_end, iswrite); if (done >= 0) *ppos += done; @@ -345,7 +346,8 @@ ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf, * probing, so we don't currently worry about access in relation * to the memory enable bit in the command register. */ - done = do_io_rw(vdev, false, iomem, buf, off, count, 0, 0, iswrite); + done = vfio_pci_core_do_io_rw(vdev, false, iomem, buf, off, count, + 0, 0, iswrite); vga_put(vdev->pdev, rsrc); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 562e8754869d..d478e6f1be02 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -129,5 +129,8 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, pci_channel_state_t state); - +ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, + void __iomem *io, char __user *buf, + loff_t off, size_t count, size_t x_start, + size_t x_end, bool iswrite); #endif /* VFIO_PCI_CORE_H */