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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jan 2024 00:07:08.2457 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 22a9f63e-7b22-4c19-913b-08dc13026ae2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6083 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787841087232558827 X-GMAIL-MSGID: 1787841087232558827 Introduce IOMMU_HWPT_DATA_AMD_V2 data type for AMD IOMMU v2 page table, which is used for stage-1 in nested translation. The data structure contains information necessary for setting up the AMD HW-vIOMMU support. Signed-off-by: Suravee Suthikulpanit --- include/uapi/linux/iommufd.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 9901b9f4abe2..b28ec5947571 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -389,14 +389,39 @@ struct iommu_hwpt_vtd_s1 { __u32 __reserved; }; +/** + * struct iommu_hwpt_amd_v2 - AMD IOMMU specific user-managed + * v2 I/O page table data + * @gcr3: GCR3 guest physical ddress + * @flags.glx: GCR3 table levels + * @flags.giov: GIOV mode + * @flags.guest_paging_mode: Guest v2 page table paging mode + * @flags.reserved : Must be 0 + * @gdom_id: Guest domain ID + * @__reserved: Must be 0 + */ +struct iommu_hwpt_amd_v2 { + __aligned_u64 gcr3; + struct { + __aligned_u64 glx : 1, + giov : 1, + guest_paging_mode : 2, + reserved : 60; + } flags; + __u32 gdom_id; + __u32 __reserved; +}; + /** * enum iommu_hwpt_data_type - IOMMU HWPT Data Type * @IOMMU_HWPT_DATA_NONE: no data * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table + * @IOMMU_HWPT_DATA_AMD_V2: AMD IOMMUv2 page table */ enum iommu_hwpt_data_type { IOMMU_HWPT_DATA_NONE, IOMMU_HWPT_DATA_VTD_S1, + IOMMU_HWPT_DATA_AMD_V2, }; /**