diff mbox series

media: i2c: ar0521: fix spellos

Message ID 20240111043302.15641-1-rdunlap@infradead.org
State New
Headers
Series media: i2c: ar0521: fix spellos |

Commit Message

Randy Dunlap Jan. 11, 2024, 4:33 a.m. UTC 
  Fix spelling mistakes as reported by codespell.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Krzysztof Hałasa <khalasa@piap.pl>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-media@vger.kernel.org
---
 drivers/media/i2c/ar0521.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Krzysztof Hałasa Jan. 22, 2024, 5:28 a.m. UTC | #1 
Hi Randy,

Good catches, thanks for your work.

Randy Dunlap <rdunlap@infradead.org> writes:

> Fix spelling mistakes as reported by codespell.

Acked-by: Krzysztof Hałasa <khalasa@piap.pl>

> --- a/drivers/media/i2c/ar0521.c
> +++ b/drivers/media/i2c/ar0521.c
> @@ -314,7 +314,7 @@ static void ar0521_calc_pll(struct ar052
>          * In the clock tree:
>          * MIPI_CLK = PIXEL_CLOCK * bpp / 2 / 2
>          *
> -        * Generic pixel_rate to bus clock frequencey equation:
> +        * Generic pixel_rate to bus clock frequency equation:
>          * MIPI_CLK = V4L2_CID_PIXEL_RATE * bpp / lanes / 2
>          *
>          * From which we derive the PIXEL_CLOCK to use in the clock tree:
> @@ -327,7 +327,7 @@ static void ar0521_calc_pll(struct ar052
>          *
>          * TODO: in case we have less data lanes we have to reduce the desired
>          * VCO not to exceed the limits specified by the datasheet and
> -        * consequentially reduce the obtained pixel clock.
> +        * consequently reduce the obtained pixel clock.
>          */
>         pixel_clock = AR0521_PIXEL_CLOCK_RATE * 2 / sensor->lane_count;
>         bpp = ar0521_code_to_bpp(sensor);
> @@ -806,7 +806,7 @@ static const struct initial_reg {
>         REGS(be(0x3F00),
>              be(0x0017),  /* 3F00: BM_T0 */
>              be(0x02DD),  /* 3F02: BM_T1 */
> -            /* 3F04: if Ana_gain less than 2, use noise_floor0, multipl */
> +            /* 3F04: if Ana_gain less than 2, use noise_floor0, multiply */
>              be(0x0020),
>              /* 3F06: if Ana_gain between 4 and 7, use noise_floor2 and */
>              be(0x0040),
>
>
diff mbox series

Patch

diff -- a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
--- a/drivers/media/i2c/ar0521.c
+++ b/drivers/media/i2c/ar0521.c
@@ -314,7 +314,7 @@  static void ar0521_calc_pll(struct ar052
 	 * In the clock tree:
 	 * MIPI_CLK = PIXEL_CLOCK * bpp / 2 / 2
 	 *
-	 * Generic pixel_rate to bus clock frequencey equation:
+	 * Generic pixel_rate to bus clock frequency equation:
 	 * MIPI_CLK = V4L2_CID_PIXEL_RATE * bpp / lanes / 2
 	 *
 	 * From which we derive the PIXEL_CLOCK to use in the clock tree:
@@ -327,7 +327,7 @@  static void ar0521_calc_pll(struct ar052
 	 *
 	 * TODO: in case we have less data lanes we have to reduce the desired
 	 * VCO not to exceed the limits specified by the datasheet and
-	 * consequentially reduce the obtained pixel clock.
+	 * consequently reduce the obtained pixel clock.
 	 */
 	pixel_clock = AR0521_PIXEL_CLOCK_RATE * 2 / sensor->lane_count;
 	bpp = ar0521_code_to_bpp(sensor);
@@ -806,7 +806,7 @@  static const struct initial_reg {
 	REGS(be(0x3F00),
 	     be(0x0017),  /* 3F00: BM_T0 */
 	     be(0x02DD),  /* 3F02: BM_T1 */
-	     /* 3F04: if Ana_gain less than 2, use noise_floor0, multipl */
+	     /* 3F04: if Ana_gain less than 2, use noise_floor0, multiply */
 	     be(0x0020),
 	     /* 3F06: if Ana_gain between 4 and 7, use noise_floor2 and */
 	     be(0x0040),