From patchwork Tue Jan 9 07:25:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengyang Chen X-Patchwork-Id: 186241 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:37c1:b0:101:2151:f287 with SMTP id y1csp1501766dyq; Mon, 8 Jan 2024 23:58:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IE4HxoL6SbaNQ8XR7h8fO76v4qNTxdJTd52Y8ta3ZzEu5KmLMkrQLQez3qtX0ZyA6gOpIBr X-Received: by 2002:a17:902:7843:b0:1d4:748f:d4a with SMTP id e3-20020a170902784300b001d4748f0d4amr1985095pln.36.1704787106762; Mon, 08 Jan 2024 23:58:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1704787106; cv=pass; d=google.com; s=arc-20160816; b=QIlSCihOR5x4+gvWtXzhKobo9RA2VwxBwHo9XogVaE65SdYzVFPGGd01rmZj2XFd8B ArjEBmLQ/853bZ80GPMiCBHzqfizvfn4uDEcp4BtrzCwSabVOYWpjTUCeNEmrOm7NdcL EL0s6T0w2Ba4oe9CiVJe50d5G/REH40HpepoEldcJengiHPxPp2ygqCCnV3Ahc8J3qyf zgBspsAozw7KM3zG6iWOiJ9dcQir56UU5tSybrvvi7c1WgYIsM2dRWEG811yYRoR00UT TfX5FPcKi+215/666hHhv6FIZQ2Y2q1eQpvZ5SdVuygTt84dkxfviWcDq7rAPQPRrBXR A8aw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RyBNE/c5ohK97c6vvQAsxO3Nu5hkH4bde+VEnNwEOa0=; fh=egwdS56070MuxlzfIHBYfgOvzDUWXHpIkzV3rCIAwmM=; b=AqOJIv77/kJs4BIgKZuiSTs5HhFH427il4mNFXlJqeGvxaVcU8T5/YD/YorrGlH4S3 8mxYPeQGWl31lq2zhHB9Y+57N9G/7LRWYkCdwYH4wY+ykrTPdcov7an7oBKM6DW1ltbS 0pwWW/K3Sugdocu06FS/IzWDCTF/RWDqp4hsPdFi3gTEp5CeDsQrZMLq8K5twuq9Uowf 5ehFxBdMiSkssBzmPfRUJY7ha+zdidNj8fsb43vUmC4IZVHa3BZTLNFtrWsx2tcKLVEU mu0doTjUmxy6sBPm63xSjJRbTvKWFlElyCA4dab7I8nr1V7rLdXidCFqFoIUnjc9wZaI y3Ww== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=starfivetech.com dkim=pass dkdomain=starfivetech.com dmarc=pass fromdomain=starfivetech.com); spf=pass (google.com: domain of linux-kernel+bounces-20487-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-20487-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id h3-20020a170902f70300b001d3ac497f07si1089353plo.565.2024.01.08.23.58.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 23:58:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-20487-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=starfivetech.com dkim=pass dkdomain=starfivetech.com dmarc=pass fromdomain=starfivetech.com); spf=pass (google.com: domain of linux-kernel+bounces-20487-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-20487-ouuuleilei=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 6D297B255E7 for ; Tue, 9 Jan 2024 07:41:33 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2A1291400F; Tue, 9 Jan 2024 07:41:02 +0000 (UTC) Received: from CHN02-BJS-obe.outbound.protection.partner.outlook.cn (mail-bjschn02on2048.outbound.protection.partner.outlook.cn [139.219.17.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D94D09477; Tue, 9 Jan 2024 07:40:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=starfivetech.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IisVBVwVCo/++08g3i5VHvwbDtOWZUMHLKjyf+J8VH+WedNbIx9nziC0zuiaC5bDu0e2ZO1VmffJ51VuBFctonJ4gPOWcWsKqcFXzYK9ExQR1mk4SNxRb8m0ovaQAodgN3mxCE6NduIQutxRJ0Dm/T2UtoclSbwr1m78d4X5OFmYNh+fVofswcMVa+xEbraCyPoiL7pGvbe/ID38Dq5X4QTa5MFR+obukVAfwB7TR5GYMqgw9DKKlTtdk1SpN+3KG8wnttBK0DHicQr+d0Xvx1kCO97F4A31WND2it97Pkl4ANm2tAzwBfViTGDyCyANMKWsyEs0SoHoLvPNReKKRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RyBNE/c5ohK97c6vvQAsxO3Nu5hkH4bde+VEnNwEOa0=; b=BPpzzxH8SxYpCW4xQ0qx6K13BrqMZS98wdSWYDp2eL3YkpDDkONgg2EiqH2AHoRytE6jl3MSIusK91YxTNmd9jSCosaQt9OppTrCNtQexuQmxo0HVqG0EqXsHyCU4jiVv817mfufzDvR417wx5Xo1RGbLX3aR8NbK9QEP95+zK9OusJZqaNYpEDMfMfWQ6RoEj5zgnfm7vK4wFuw0M1ZvCti4COol5SgnyQcKxKu0GT41AnSZ0CE62o9KIBBb/ZB7Gr+Os3QbOShshcJ86xJs0YQGXpGNTA2ScGbFrRqrt1Yld+9CQ2mSUOg2GkgnD4vXWL185LL3k5zaxuUJPVZbw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=starfivetech.com; dmarc=pass action=none header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; Received: from NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:3::6) by NT0PR01MB1231.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:e::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7135.32; Tue, 9 Jan 2024 07:25:27 +0000 Received: from NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn ([fe80::85fc:7fb9:8b00:dd88]) by NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn ([fe80::85fc:7fb9:8b00:dd88%3]) with mapi id 15.20.7135.019; Tue, 9 Jan 2024 07:25:27 +0000 From: Shengyang Chen To: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, tomi.valkeinen@ideasonboard.com, r-ravikumar@ti.com, aford173@gmail.com, rdunlap@infradead.org, u.kleine-koenig@pengutronix.de, bbrezillon@kernel.org, changhuang.liang@starfivetech.com, keith.zhao@starfivetech.com, shengyang.chen@starfivetech.com, jack.zhu@starfivetech.com, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] gpu: drm: bridge: cadence: Add a driver and platform ops for StarFive JH7110 SoC Date: Tue, 9 Jan 2024 15:25:16 +0800 Message-Id: <20240109072516.24328-3-shengyang.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240109072516.24328-1-shengyang.chen@starfivetech.com> References: <20240109072516.24328-1-shengyang.chen@starfivetech.com> X-ClientProxiedBy: NT0PR01CA0008.CHNPR01.prod.partner.outlook.cn (2406:e500:c510::13) To NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:3::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: NT0PR01MB1070:EE_|NT0PR01MB1231:EE_ X-MS-Office365-Filtering-Correlation-Id: 1871c946-213e-4eb4-f41f-08dc10e426c8 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bCm187VP5pnl8t5Sc7ONQN24ZH1BIN8sUUTYcK1oIXwraQxYK9evC76lUv3nPSyjxvhq040lYuIkO/giBNc8ZNq1ajSpCpPeWlddA/tLM9LjI4SNLMhfJxA8GCqQOpCnfXnQ2b0+anbRSa4wX63NdE4wN3HDWnpv0XqDpy3yomZJ374iKQyCOak5MwL2NMMXR+nxPzPJ9dOoGpHWGWiayEgVV7mtyFyVPLzPA7hbBMqqb5uzkF0TV3M7sWSXiFAxe+JJ/1gLL267yacUXRTqk767CuojXBP4+N2vqLjcsZqExD2Ywrt6H+KQhu390+VEpt3Yj3cPj6gJROpIHxaKmvJTZ6YAoiNhKE/bjqHRbT6g6OiOLEN01Ugwl0DeE1MauNnmifkRL6+y3EkQuHgwZQiZWkvKMhj6+9GgnZuXlNmOtTY52IHyc8YE+/oXnWwra+5Ypgec/c6QSTkjurhqeEY+o+sJvp9Xmea/VCWo9whH5egPFHkKW7cmf3biCZudnj2tyHEdaHOYLRBfNb3eVj+uVSI69PYYmG1wx9GhDeviLUZ8dFH7SiLA6VLHATLg X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn;PTR:;CAT:NONE;SFS:(13230031)(396003)(136003)(366004)(39830400003)(346002)(230922051799003)(186009)(451199024)(1800799012)(64100799003)(86362001)(66946007)(40160700002)(36756003)(40180700001)(38100700002)(83380400001)(1076003)(38350700005)(508600001)(52116002)(6666004)(7416002)(8676002)(8936002)(2906002)(66556008)(4326008)(44832011)(5660300002)(66476007)(30864003)(26005)(41300700001)(2616005)(41320700001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CrJE1grbSG18oq9ytGs0xx4cX2ufDljgJkpUfGDKkImcy/bYJhwh8s6bn4zUBjSeQqUztZejbw9XpPQJVA5re2ctoJx//e9ONUh7VaCrfxoHZSL9WJ/wVke9ddVzJ1JqG+GrFpSgUMVTLwWOuSzC4G+4otBFZJizILd0H1Gke4En3f7Wf20DTtqfX6Bi3ZTJVh8TLF5oD+Oq3Y6J/bSrrH14cv+yCeRO3+QS7hSb04qytOy0frp5mIxtLUKuWrEO/hnIh7SpFQ9V9gPI/3KtvtUsYzjTMg4pvFykKtWG1CIPvGKcUVZu08ZMifs4dUAajYlXJQ1SJx7X3b1Oi/5IcDWge2kDRYyUDB5yUvP1a0JhZQ6Yea9BF+k1Tzdu4kdqy9eEJCTRsVjrNcE7kVa7U0k06L21455G/SlYNxapKFQZkoiVsqu1e9aDr981O78T+c+TqVfoQ1Ktnc3f2vWXNKM0SUu/G6qBv2djMK/RvfQUNwS6qkS9b/H9SdWBZYgGVSwN6qhOX3A1lGCTdcPCrCrvtUYYMZ7MxbcAbpJuT9N28LbjhEzAPs0n8XKJYTO2SOiKnTuCIS4atSdaHdk2kIAFpykzEF1PVVm8d23ZNU4LgS5vu1efp+7BPxzI6OPjBsEr1BHj/c4GlXsT5fPG+j4fCfM58btEgtMFMy7/8+rQGjqPHu7hXRM8g+ocXgUFf8ZB031CO8/LaOa9V9iKPVz3FQfN/kPpwhMXGaJYJCsoMM21omwhLkYhqzse05L7fGsI9dQwOFWLImqfBDIHDnDL0TZsMsTfnRIxTrZxoUdWA8AJvsM6R1jXYaVIWJ37H6rS5S83Eaq1Nkqw2c9Pt0wK+NVC6YtZf2gyQY1BZvuxr5KAM/xFUIOU5zn91gAIacElQhuRNm0jTl7m2k8VD3l68R7ju1NYdV26DqlVRP807KHVEuuHU2X/ucORDCJfvbQT+Ss0uyWE1L+3IZBXFDJpiYmySFNFNLbLSB2oXoB5FzQLJdJXNbrkOYdgkthJkbr9zyeduX7z5gLVQMHoiS//bULJikl/MV8m2eonqFRqFa3jkHu+/555oeF4Mcx6LOXlOXCLwVT65MwUAsFmYJaKlKKNBZCxJxChm/0YxJxYcmLsbl414pcPQM2jLFHfRad0IIlsEZouxySG9dt4TUwrDdqEcd571FxM2HBAYQrgWDI6Oe1FB4BKVYNzIhKVTxM+Aosw+w3Izz38qG1E3q0OZonxXctEmPjkWIUjmOFMr1Q9PFqwxkjTj4O+bAN/kvHDlhS9dj1bUGgwGaSXIC2For0QSTAnOqfhol2JkKfrkl6+aRV3VYInK83o3qii4KDixcvoHiVB+WZ+ZrOScDxBOe+wQ8vQDlC7mRukx304Plo2MbOfohu0jn4Weto2QTTbmtqjNGwvr16XimF9bQj9Bw9WV+wp7Z/XNEaPdZD6XbAmhf4qSKk5pnzF9LpzlZAHd+62ZMwiKyPhhmARW1DGWZvOiPVLh/o0NhI2Nze2cOjvXzfHTh1PDH2pPZDhU5kz9raPZgKm6PQzBsYrLBMI3Vvt3GtyDMK4GCeEoyPJ+r+QRRJFghV92TyaqQ/b2zFHn1vn9g/4d7SoU/bGNDnvbnriZ+tGEHsPwphSGIM= X-OriginatorOrg: starfivetech.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1871c946-213e-4eb4-f41f-08dc10e426c8 X-MS-Exchange-CrossTenant-AuthSource: NT0PR01MB1070.CHNPR01.prod.partner.outlook.cn X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jan 2024 07:25:27.0750 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: yMFlPADzGlDKts0BLOrlrxw8sLPImz+TpPVawgTso3xBNCWPeJpGlRVdF+6yCpDO4GZScIEnIQGQ9NP4tpkb+rVa7zapBI1NUQOj9qC8tJA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: NT0PR01MB1231 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787598844896731399 X-GMAIL-MSGID: 1787598844896731399 From: Keith Zhao In order to fit CDNS DSI module in StarFive JH7110 SoC, The mainly modification is followed: 1.Add driver for StarFive JH7110 SoC to drive its CDNS DSI module. 2.Add platform ops in cdns-dsi.c for StarFive JH7110 SoC probing. Signed-off-by: Keith Zhao --- MAINTAINERS | 8 + drivers/gpu/drm/bridge/cadence/Kconfig | 7 + drivers/gpu/drm/bridge/cadence/Makefile | 1 + .../gpu/drm/bridge/cadence/cdns-dsi-core.c | 29 ++- .../gpu/drm/bridge/cadence/cdns-dsi-core.h | 21 ++ .../gpu/drm/bridge/cadence/cdns-dsi-jh7110.c | 193 ++++++++++++++++++ .../gpu/drm/bridge/cadence/cdns-dsi-jh7110.h | 16 ++ 7 files changed, 274 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.c create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.h diff --git a/MAINTAINERS b/MAINTAINERS index d32920dd943f..a220ea04f5c4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6847,6 +6847,14 @@ F: Documentation/devicetree/bindings/display/solomon,ssd-common.yaml F: Documentation/devicetree/bindings/display/solomon,ssd13*.yaml F: drivers/gpu/drm/solomon/ssd130x* +DRM DRIVERS FOR STARFIVE +M: Keith Zhao +M: Shengyang Chen +L: dri-devel@lists.freedesktop.org +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110* + DRM DRIVER FOR ST-ERICSSON MCDE M: Linus Walleij S: Maintained diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig index cced81633ddc..ad9f572f4720 100644 --- a/drivers/gpu/drm/bridge/cadence/Kconfig +++ b/drivers/gpu/drm/bridge/cadence/Kconfig @@ -19,6 +19,13 @@ config DRM_CDNS_DSI_J721E help Support J721E Cadence DSI wrapper. The wrapper manages the routing of the DSS DPI signal to the Cadence DSI. + +config DRM_CDNS_DSI_JH7110 + bool "JH7110 SOC Cadence DSI support" + default n + help + Cadence DPI to DSI bridge which is embedded in the + StarFive JH7110 SoC. endif config DRM_CDNS_MHDP8546 diff --git a/drivers/gpu/drm/bridge/cadence/Makefile b/drivers/gpu/drm/bridge/cadence/Makefile index c95fd5b81d13..87f603a9f4ad 100644 --- a/drivers/gpu/drm/bridge/cadence/Makefile +++ b/drivers/gpu/drm/bridge/cadence/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o cdns-dsi-y := cdns-dsi-core.o cdns-dsi-$(CONFIG_DRM_CDNS_DSI_J721E) += cdns-dsi-j721e.o +cdns-dsi-$(CONFIG_DRM_CDNS_DSI_JH7110) += cdns-dsi-jh7110.o obj-$(CONFIG_DRM_CDNS_MHDP8546) += cdns-mhdp8546.o cdns-mhdp8546-y := cdns-mhdp8546-core.o cdns-mhdp8546-hdcp.o cdns-mhdp8546-$(CONFIG_DRM_CDNS_MHDP8546_J721E) += cdns-mhdp8546-j721e.o diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 7457d38622b0..a8f976f9eeed 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -27,6 +27,10 @@ #include "cdns-dsi-j721e.h" #endif +#ifdef CONFIG_DRM_CDNS_DSI_JH7110 +#include "cdns-dsi-jh7110.h" +#endif + #define IP_CONF 0x0 #define SP_HS_FIFO_DEPTH(x) (((x) & GENMASK(30, 26)) >> 26) #define SP_LP_FIFO_DEPTH(x) (((x) & GENMASK(25, 21)) >> 21) @@ -552,6 +556,10 @@ static int cdns_dsi_adjust_phy_config(struct cdns_dsi *dsi, /* data rate was in bytes/sec, convert to bits/sec. */ phy_cfg->hs_clk_rate = dlane_bps * 8; + if (dsi->platform_ops && dsi->platform_ops->update) + adj_dsi_htotal = dsi->platform_ops->update(dsi, dsi_cfg, phy_cfg, + dpi_hz, dpi_htotal, dsi_htotal); + dsi_hfp_ext = adj_dsi_htotal - dsi_htotal; dsi_cfg->hfp += dsi_hfp_ext; dsi_cfg->htotal = dsi_htotal + dsi_hfp_ext; @@ -683,7 +691,7 @@ static void cdns_dsi_bridge_post_disable(struct drm_bridge *bridge) pm_runtime_put(dsi->base.dev); } -static void cdns_dsi_hs_init(struct cdns_dsi *dsi) +void cdns_dsi_hs_init(struct cdns_dsi *dsi) { struct cdns_dsi_output *output = &dsi->output; u32 status; @@ -1026,6 +1034,14 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host, cdns_dsi_init_link(dsi); + /* + * on JH7110 SoC , when transfer dsi command , + * cdns_dsi_hs_init is needed. + * or the final ret will be error value. + */ + if (dsi->platform_ops && dsi->platform_ops->transfer) + dsi->platform_ops->transfer(dsi); + ret = mipi_dsi_create_packet(&packet, msg); if (ret) goto out; @@ -1142,6 +1158,9 @@ static int __maybe_unused cdns_dsi_resume(struct device *dev) clk_prepare_enable(dsi->dsi_p_clk); clk_prepare_enable(dsi->dsi_sys_clk); + if (dsi->platform_ops && dsi->platform_ops->resume) + dsi->platform_ops->resume(dsi); + return 0; } @@ -1152,6 +1171,10 @@ static int __maybe_unused cdns_dsi_suspend(struct device *dev) clk_disable_unprepare(dsi->dsi_sys_clk); clk_disable_unprepare(dsi->dsi_p_clk); reset_control_assert(dsi->dsi_p_rst); + + if (dsi->platform_ops && dsi->platform_ops->suspend) + dsi->platform_ops->suspend(dsi); + dsi->link_initialized = false; return 0; } @@ -1294,6 +1317,10 @@ static const struct of_device_id cdns_dsi_of_match[] = { #ifdef CONFIG_DRM_CDNS_DSI_J721E { .compatible = "ti,j721e-dsi", .data = &dsi_ti_j721e_ops, }, #endif +#ifdef CONFIG_DRM_CDNS_DSI_JH7110 + { .compatible = "starfive,jh7110-dsi", .data = &dsi_ti_jh7110_ops, }, +#endif + { }, }; MODULE_DEVICE_TABLE(of, cdns_dsi_of_match); diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h index ca7ea2da635c..f4491009c977 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h @@ -53,12 +53,22 @@ struct cdns_dsi; * @deinit: Called in the CDNS DSI remove * @enable: Called at the beginning of CDNS DSI bridge enable * @disable: Called at the end of CDNS DSI bridge disable + * @resume: Called at the resume of CDNS DSI + * @suspend: Called at the suspend of CDNS DSI + * @update: Called at the middle of CDNS DSI bridge enable */ struct cdns_dsi_platform_ops { int (*init)(struct cdns_dsi *dsi); void (*deinit)(struct cdns_dsi *dsi); void (*enable)(struct cdns_dsi *dsi); void (*disable)(struct cdns_dsi *dsi); + void (*resume)(struct cdns_dsi *dsi); + void (*suspend)(struct cdns_dsi *dsi); + int (*update)(struct cdns_dsi *dsi, struct cdns_dsi_cfg *dsi_cfg, + struct phy_configure_opts_mipi_dphy *phy_cfg, + unsigned long dpi_hz, unsigned long dpi_htotal, + unsigned long dsi_htotal); + void (*transfer)(struct cdns_dsi *dsi); }; struct cdns_dsi { @@ -79,6 +89,17 @@ struct cdns_dsi { bool link_initialized; bool phy_initialized; struct phy *dphy; + +#ifdef CONFIG_DRM_CDNS_DSI_JH7110 + struct clk *apb_clk; + struct clk *txesc_clk; + struct reset_control *dpi_rst; + struct reset_control *apb_rst; + struct reset_control *txesc_rst; + struct reset_control *txbytehs_rst; +#endif }; +void cdns_dsi_hs_init(struct cdns_dsi *dsi); + #endif /* !__CDNS_DSI_H__ */ diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.c new file mode 100644 index 000000000000..654d083f49e1 --- /dev/null +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.c @@ -0,0 +1,193 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * JH7110 SoC Cadence DSI wrapper + * + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include + +#include "cdns-dsi-jh7110.h" + +static int cdns_dsi_clock_enable(struct cdns_dsi *dsi, struct device *dev) +{ + int ret; + + ret = clk_prepare_enable(dsi->apb_clk); + if (ret) { + dev_err(dev, "Failed to prepare/enable apb_clk\n"); + return ret; + } + + ret = clk_prepare_enable(dsi->txesc_clk); + if (ret) { + dev_err(dev, "Failed to prepare/enable txesc_clk\n"); + return ret; + } + + return ret; +} + +static void cdns_dsi_clock_disable(struct cdns_dsi *dsi) +{ + clk_disable_unprepare(dsi->apb_clk); + clk_disable_unprepare(dsi->txesc_clk); +} + +static int cdns_dsi_resets_deassert(struct cdns_dsi *dsi, struct device *dev) +{ + int ret; + + ret = reset_control_deassert(dsi->apb_rst); + if (ret < 0) { + dev_err(dev, "failed to deassert apb_rst\n"); + return ret; + } + + ret = reset_control_deassert(dsi->txesc_rst); + if (ret < 0) { + dev_err(dev, "failed to deassert txesc_rst\n"); + return ret; + } + + ret = reset_control_deassert(dsi->dpi_rst); + if (ret < 0) { + dev_err(dev, "failed to deassert dpi_rst\n"); + return ret; + } + + return ret; +} + +static int cdns_dsi_resets_assert(struct cdns_dsi *dsi, struct device *dev) +{ + int ret; + + ret = reset_control_assert(dsi->apb_rst); + if (ret < 0) { + dev_err(dev, "failed to assert apb_rst\n"); + return ret; + } + + ret = reset_control_assert(dsi->txesc_rst); + if (ret < 0) { + dev_err(dev, "failed to assert txesc_rst\n"); + return ret; + } + + ret = reset_control_assert(dsi->dpi_rst); + if (ret < 0) { + dev_err(dev, "failed to assert dpi_rst\n"); + return ret; + } + + return ret; +} + +static int cdns_dsi_get_clock(struct device *dev, struct cdns_dsi *dsi) +{ + dsi->apb_clk = devm_clk_get(dev, "apb"); + if (IS_ERR(dsi->apb_clk)) + return PTR_ERR(dsi->apb_clk); + + dsi->txesc_clk = devm_clk_get(dev, "txesc"); + if (IS_ERR(dsi->txesc_clk)) + return PTR_ERR(dsi->txesc_clk); + + return 0; +} + +static int cdns_dsi_get_reset(struct device *dev, struct cdns_dsi *dsi) +{ + dsi->dpi_rst = devm_reset_control_get(dev, "dpi"); + if (IS_ERR(dsi->dpi_rst)) + return PTR_ERR(dsi->dpi_rst); + + dsi->apb_rst = devm_reset_control_get(dev, "apb"); + if (IS_ERR(dsi->apb_rst)) + return PTR_ERR(dsi->apb_rst); + + dsi->txesc_rst = devm_reset_control_get(dev, "txesc"); + if (IS_ERR(dsi->txesc_rst)) + return PTR_ERR(dsi->txesc_rst); + + dsi->txbytehs_rst = devm_reset_control_get(dev, "txbytehs"); + if (IS_ERR(dsi->txbytehs_rst)) + return PTR_ERR(dsi->txbytehs_rst); + + return 0; +} + +static int cdns_dsi_jh7110_init(struct cdns_dsi *dsi) +{ + int ret; + + ret = cdns_dsi_get_clock(dsi->base.dev, dsi); + if (ret) + return ret; + + return cdns_dsi_get_reset(dsi->base.dev, dsi); +} + +static void cdns_dsi_jh7110_resume(struct cdns_dsi *dsi) +{ + int ret; + + ret = cdns_dsi_clock_enable(dsi, dsi->base.dev); + if (ret) { + dev_err(dsi->base.dev, "failed to enable clock\n"); + return; + } + ret = cdns_dsi_resets_deassert(dsi, dsi->base.dev); + if (ret < 0) { + dev_err(dsi->base.dev, "failed to deassert reset\n"); + return; + } +} + +static void cdns_dsi_jh7110_suspend(struct cdns_dsi *dsi) +{ + int ret; + + ret = cdns_dsi_resets_assert(dsi, dsi->base.dev); + if (ret < 0) { + dev_err(dsi->base.dev, "failed to deassert reset\n"); + return; + } + + cdns_dsi_clock_disable(dsi); +} + +static int cdns_dsi_jh7110_update(struct cdns_dsi *dsi, struct cdns_dsi_cfg *dsi_cfg, + struct phy_configure_opts_mipi_dphy *phy_cfg, + unsigned long dpi_hz, unsigned long dpi_htotal, + unsigned long dsi_htotal) +{ + unsigned long long dlane_bps; + unsigned long adj_dsi_htotal; + unsigned int lanes = dsi->output.dev->lanes; + + phy_cfg->hs_clk_rate = phy_cfg->hs_clk_rate - (phy_cfg->hs_clk_rate % 10000000); + phy_cfg->hs_clk_rate = phy_cfg->hs_clk_rate + 40000000; + dlane_bps = phy_cfg->hs_clk_rate * lanes * dpi_htotal / 8; + adj_dsi_htotal = dlane_bps / dpi_hz; + + return adj_dsi_htotal; +} + +static void jh7110_cdns_dsi_hs_init(struct cdns_dsi *dsi) +{ + cdns_dsi_hs_init(dsi); + reset_control_deassert(dsi->txbytehs_rst); +} + +const struct cdns_dsi_platform_ops dsi_ti_jh7110_ops = { + .init = cdns_dsi_jh7110_init, + .resume = cdns_dsi_jh7110_resume, + .suspend = cdns_dsi_jh7110_suspend, + .update = cdns_dsi_jh7110_update, + .transfer = jh7110_cdns_dsi_hs_init, +}; diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.h b/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.h new file mode 100644 index 000000000000..15d6a766b502 --- /dev/null +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-jh7110.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * JH7110 Cadence DSI + * + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. + * Author: keith.zhao + */ + +#ifndef __CDNS_DSI_JH7110_H__ +#define __CDNS_DSI_JH7110_H__ + +#include "cdns-dsi-core.h" + +extern const struct cdns_dsi_platform_ops dsi_ti_jh7110_ops; + +#endif /* !__CDNS_DSI_JH7110_H__ */