diff mbox series

[v2,1/2] dt-bindings: display: bridge: cdns: Add properties to support StarFive JH7110 SoC

Message ID 20240109072516.24328-2-shengyang.chen@starfivetech.com
State New
Headers
Series Add StarFive JH7110 SoC DSI support |

Commit Message

Shengyang Chen Jan. 9, 2024, 7:25 a.m. UTC 
  From: Keith Zhao <keith.zhao@starfivetech.com>

Add properties in CDNS DSI yaml file to match with
CDNS DSI module in StarFive JH7110 SoC.

Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
---
 .../bindings/display/bridge/cdns,dsi.yaml     | 44 ++++++++++++++++++-
 1 file changed, 42 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski Jan. 10, 2024, 9:06 p.m. UTC | #1 
On 09/01/2024 08:25, Shengyang Chen wrote:
> From: Keith Zhao <keith.zhao@starfivetech.com>
> 
> Add properties in CDNS DSI yaml file to match with
> CDNS DSI module in StarFive JH7110 SoC.

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

Subject: Make it concise, like: "Add StarFive JH7110 SoC display bridge
or something".

> 
> Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
> ---
>  .../bindings/display/bridge/cdns,dsi.yaml     | 44 ++++++++++++++++++-
>  1 file changed, 42 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> index 23060324d16e..da091e105794 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> @@ -16,6 +16,7 @@ properties:
>    compatible:
>      enum:
>        - cdns,dsi
> +      - starfve,jh7110-dsi
>        - ti,j721e-dsi
>  
>    reg:
> @@ -27,14 +28,20 @@ properties:
>            Register block for wrapper settings registers in case of TI J7 SoCs.
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: PSM clock, used by the IP
>        - description: sys clock, used by the IP
> +      - description: apb clock, used by the IP
> +      - description: txesc clock, used by the IP
>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: dsi_p_clk
>        - const: dsi_sys_clk
> +      - const: apb
> +      - const: txesc
>  
>    phys:
>      maxItems: 1
> @@ -46,10 +53,21 @@ properties:
>      maxItems: 1
>  
>    resets:
> -    maxItems: 1
> +    minItems: 1
> +    items:
> +      - description: dsi sys reset line
> +      - description: dsi dpi reset line
> +      - description: dsi apb reset line
> +      - description: dsi txesc reset line
> +      - description: dsi txbytehs reset line
>  
>    reset-names:
> -    const: dsi_p_rst
> +    items:
> +      - const: dsi_p_rst
> +      - const: dpi
> +      - const: apb
> +      - const: txesc
> +      - const: txbytehs
>  
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
> @@ -90,6 +108,28 @@ allOf:
>          reg:
>            maxItems: 1
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: starfive,jh7110-dsi
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 4
> +          maxItems: 4
> +        resets:
> +          minItems: 5
> +          maxItems: 5

Missing constraints for xxx-names.

> +      required:
> +        - reset-names
> +    else:
> +      properties:
> +        clocks:
> +          maxItems: 2
> +        resets:
> +          maxItems: 1

Same problem.

Best regards,
Krzysztof
Shengyang Chen Jan. 16, 2024, 8:46 a.m. UTC | #2 
Hi, Krzysztof

Thanks for review and comment.

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: 2024年1月11日 5:06
> To: Shengyang Chen <shengyang.chen@starfivetech.com>;
> devicetree@vger.kernel.org; dri-devel@lists.freedesktop.org
> Cc: andrzej.hajda@intel.com; neil.armstrong@linaro.org; rfoss@kernel.org;
> Laurent.pinchart@ideasonboard.com; jonas@kwiboo.se;
> jernej.skrabec@gmail.com; maarten.lankhorst@linux.intel.com;
> mripard@kernel.org; tzimmermann@suse.de; airlied@gmail.com;
> daniel@ffwll.ch; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; p.zabel@pengutronix.de;
> tomi.valkeinen@ideasonboard.com; r-ravikumar@ti.com;
> aford173@gmail.com; rdunlap@infradead.org;
> u.kleine-koenig@pengutronix.de; bbrezillon@kernel.org; Changhuang Liang
> <changhuang.liang@starfivetech.com>; Keith Zhao
> <keith.zhao@starfivetech.com>; Jack Zhu <jack.zhu@starfivetech.com>;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 1/2] dt-bindings: display: bridge: cdns: Add properties to
> support StarFive JH7110 SoC
> 
> On 09/01/2024 08:25, Shengyang Chen wrote:
> > From: Keith Zhao <keith.zhao@starfivetech.com>
> >
> > Add properties in CDNS DSI yaml file to match with CDNS DSI module in
> > StarFive JH7110 SoC.
> 
> Please wrap commit message according to Linux coding style / submission
> process (neither too early nor over the limit):
> https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submi
> tting-patches.rst#L597
> 
> Subject: Make it concise, like: "Add StarFive JH7110 SoC display bridge or
> something".
> 

ok, will follow up this issue.
thanks for suggestion.

> >
> > Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
> > ---
> >  .../bindings/display/bridge/cdns,dsi.yaml     | 44 ++++++++++++++++++-
> >  1 file changed, 42 insertions(+), 2 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> > b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> > index 23060324d16e..da091e105794 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> > @@ -16,6 +16,7 @@ properties:
> >    compatible:
> >      enum:
> >        - cdns,dsi
> > +      - starfve,jh7110-dsi
> >        - ti,j721e-dsi
> >
> >    reg:
> > @@ -27,14 +28,20 @@ properties:
> >            Register block for wrapper settings registers in case of TI J7
> SoCs.
> >
> >    clocks:
> > +    minItems: 2
> >      items:
> >        - description: PSM clock, used by the IP
> >        - description: sys clock, used by the IP
> > +      - description: apb clock, used by the IP
> > +      - description: txesc clock, used by the IP
> >
> >    clock-names:
> > +    minItems: 2
> >      items:
> >        - const: dsi_p_clk
> >        - const: dsi_sys_clk
> > +      - const: apb
> > +      - const: txesc
> >
> >    phys:
> >      maxItems: 1
> > @@ -46,10 +53,21 @@ properties:
> >      maxItems: 1
> >
> >    resets:
> > -    maxItems: 1
> > +    minItems: 1
> > +    items:
> > +      - description: dsi sys reset line
> > +      - description: dsi dpi reset line
> > +      - description: dsi apb reset line
> > +      - description: dsi txesc reset line
> > +      - description: dsi txbytehs reset line
> >
> >    reset-names:
> > -    const: dsi_p_rst
> > +    items:
> > +      - const: dsi_p_rst
> > +      - const: dpi
> > +      - const: apb
> > +      - const: txesc
> > +      - const: txbytehs
> >
> >    ports:
> >      $ref: /schemas/graph.yaml#/properties/ports
> > @@ -90,6 +108,28 @@ allOf:
> >          reg:
> >            maxItems: 1
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: starfive,jh7110-dsi
> > +    then:
> > +      properties:
> > +        clocks:
> > +          minItems: 4
> > +          maxItems: 4
> > +        resets:
> > +          minItems: 5
> > +          maxItems: 5
> 
> Missing constraints for xxx-names.
> 

ok, will fix it

> > +      required:
> > +        - reset-names
> > +    else:
> > +      properties:
> > +        clocks:
> > +          maxItems: 2
> > +        resets:
> > +          maxItems: 1
> 
> Same problem.
> 

ok, will fix it

> Best regards,
> Krzysztof

thanks.

Best Regards,
Shengyang
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
index 23060324d16e..da091e105794 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
@@ -16,6 +16,7 @@  properties:
   compatible:
     enum:
       - cdns,dsi
+      - starfve,jh7110-dsi
       - ti,j721e-dsi
 
   reg:
@@ -27,14 +28,20 @@  properties:
           Register block for wrapper settings registers in case of TI J7 SoCs.
 
   clocks:
+    minItems: 2
     items:
       - description: PSM clock, used by the IP
       - description: sys clock, used by the IP
+      - description: apb clock, used by the IP
+      - description: txesc clock, used by the IP
 
   clock-names:
+    minItems: 2
     items:
       - const: dsi_p_clk
       - const: dsi_sys_clk
+      - const: apb
+      - const: txesc
 
   phys:
     maxItems: 1
@@ -46,10 +53,21 @@  properties:
     maxItems: 1
 
   resets:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: dsi sys reset line
+      - description: dsi dpi reset line
+      - description: dsi apb reset line
+      - description: dsi txesc reset line
+      - description: dsi txbytehs reset line
 
   reset-names:
-    const: dsi_p_rst
+    items:
+      - const: dsi_p_rst
+      - const: dpi
+      - const: apb
+      - const: txesc
+      - const: txbytehs
 
   ports:
     $ref: /schemas/graph.yaml#/properties/ports
@@ -90,6 +108,28 @@  allOf:
         reg:
           maxItems: 1
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: starfive,jh7110-dsi
+    then:
+      properties:
+        clocks:
+          minItems: 4
+          maxItems: 4
+        resets:
+          minItems: 5
+          maxItems: 5
+      required:
+        - reset-names
+    else:
+      properties:
+        clocks:
+          maxItems: 2
+        resets:
+          maxItems: 1
+
 required:
   - compatible
   - reg