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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ5PEPF000001D1.mail.protection.outlook.com (10.167.242.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.12 via Frontend Transport; Tue, 9 Jan 2024 03:48:13 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 8 Jan 2024 21:48:07 -0600 From: Smita Koralahalli To: , , CC: Ard Biesheuvel , Alison Schofield , Vishal Verma , "Ira Weiny" , Dan Williams , Jonathan Cameron , Yazen Ghannam , Smita Koralahalli Subject: [PATCH v2 4/4] acpi/ghes, cxl/pci: Trace FW-First CXL Protocol Errors Date: Tue, 9 Jan 2024 03:47:55 +0000 Message-ID: <20240109034755.100555-5-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240109034755.100555-1-Smita.KoralahalliChannabasappa@amd.com> References: <20240109034755.100555-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D1:EE_|SA3PR12MB8046:EE_ X-MS-Office365-Filtering-Correlation-Id: f052e536-862c-458f-84a4-08dc10c5ce70 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jan 2024 03:48:13.6443 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f052e536-862c-458f-84a4-08dc10c5ce70 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8046 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787583202079803192 X-GMAIL-MSGID: 1787583202079803192 When PCIe AER is in FW-First, OS should process CXL Protocol errors from CPER records. These CPER records obtained from GHES module, will rely on a registered callback to be notified to the CXL subsystem in order to be processed. Call the existing cxl_cper_callback to notify the CXL subsystem on a Protocol error. The defined trace events cxl_aer_uncorrectable_error and cxl_aer_correctable_error currently trace native CXL AER errors. Reuse them to trace FW-First Protocol Errors. Signed-off-by: Smita Koralahalli --- v2: Added warning for serial number check. Moved severity determination to previous patch. --- drivers/acpi/apei/ghes.c | 5 +++++ drivers/cxl/core/pci.c | 29 +++++++++++++++++++++++++++++ drivers/cxl/cxlpci.h | 3 +++ drivers/cxl/pci.c | 5 +++++ include/linux/cxl-event.h | 1 + 5 files changed, 43 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 1d4f3d68a0bc..4318b602e797 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -716,10 +716,15 @@ static void cxl_cper_post_event(enum cxl_event_type event_type, void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata) { + enum cxl_event_type event_type = CXL_CPER_EVENT_PROT_ERR; struct cxl_cper_event_info info; if (cxl_cper_handle_prot_err_info(gdata, &info)) return; + + guard(rwsem_read)(&cxl_cper_rw_sem); + if (cper_callback) + cper_callback(event_type, &info); } int cxl_cper_register_callback(cxl_cper_callback callback) diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index 37e1652afbc7..bde8ebf5e4b3 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -836,6 +836,35 @@ void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport) } EXPORT_SYMBOL_NS_GPL(cxl_setup_parent_dport, CXL); +void cxl_prot_err_trace_record(struct cxl_dev_state *cxlds, + struct cxl_cper_event_info *info) +{ + struct cper_cxl_event_sn *dev_serial_num = &info->rec.hdr.dev_serial_num; + u32 status, fe; + + if (((u64)dev_serial_num->upper_dw << 32 | + dev_serial_num->lower_dw) != cxlds->serial) + pr_warn("The device serial number in CPER differs or isn't valid\n"); + + if (info->p_err.severity == CXL_AER_CORRECTABLE) { + status = info->p_err.cxl_ras.cor_status & ~info->p_err.cxl_ras.cor_mask; + + trace_cxl_aer_correctable_error(cxlds->cxlmd, status); + } else { + status = info->p_err.cxl_ras.uncor_status & ~info->p_err.cxl_ras.uncor_mask; + + if (hweight32(status) > 1) + fe = BIT(FIELD_GET(CXL_RAS_CAP_CONTROL_FE_MASK, + info->p_err.cxl_ras.cap_control)); + else + fe = status; + + trace_cxl_aer_uncorrectable_error(cxlds->cxlmd, status, fe, + info->p_err.cxl_ras.header_log); + } +} +EXPORT_SYMBOL_NS_GPL(cxl_prot_err_trace_record, CXL); + static void cxl_handle_rdport_cor_ras(struct cxl_dev_state *cxlds, struct cxl_dport *dport) { diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h index 0fa4799ea316..216003d4aec1 100644 --- a/drivers/cxl/cxlpci.h +++ b/drivers/cxl/cxlpci.h @@ -93,4 +93,7 @@ void read_cdat_data(struct cxl_port *port); void cxl_cor_error_detected(struct pci_dev *pdev); pci_ers_result_t cxl_error_detected(struct pci_dev *pdev, pci_channel_state_t state); +struct cxl_cper_event_info; +void cxl_prot_err_trace_record(struct cxl_dev_state *cxlds, + struct cxl_cper_event_info *info); #endif /* __CXL_PCI_H__ */ diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 1ad240ead4fd..515983e7df10 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -995,6 +995,11 @@ static void cxl_cper_event_call(enum cxl_event_type ev_type, if (!cxlds) return; + if (ev_type == CXL_CPER_EVENT_PROT_ERR) { + cxl_prot_err_trace_record(cxlds, info); + return; + } + /* Fabricate a log type */ hdr_flags = get_unaligned_le24(info->rec.event.generic.hdr.flags); log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags); diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index 08e3979de9a3..96cc88aa04f3 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -113,6 +113,7 @@ enum cxl_event_type { CXL_CPER_EVENT_GEN_MEDIA, CXL_CPER_EVENT_DRAM, CXL_CPER_EVENT_MEM_MODULE, + CXL_CPER_EVENT_PROT_ERR, }; #define CPER_CXL_DEVICE_ID_VALID BIT(0)