diff mbox series

[v4,10/12] riscv: mm: Make asid_bits a local variable

Message ID	20240102220134.3229156-11-samuel.holland@sifive.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel+bounces-14920-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; From: Samuel Holland <samuel.holland@sifive.com> To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexandre Ghiti <alexghiti@rivosinc.com>, Samuel Holland <samuel.holland@sifive.com> Subject: [PATCH v4 10/12] riscv: mm: Make asid_bits a local variable Date: Tue, 2 Jan 2024 14:00:47 -0800 Message-ID: <20240102220134.3229156-11-samuel.holland@sifive.com> In-Reply-To: <20240102220134.3229156-1-samuel.holland@sifive.com> References: <20240102220134.3229156-1-samuel.holland@sifive.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX
Series	riscv: ASID-related and UP-related TLB flush enhancements \| [v4,00/12] riscv: ASID-related and UP-related TLB flush enhancements [v4,01/12] riscv: Flush the instruction cache during SMP bringup [v4,02/12] riscv: Use IPIs for remote cache/TLB flushes by default [v4,03/12] riscv: mm: Broadcast kernel TLB flushes only when needed [v4,04/12] riscv: Only send remote fences when some other CPU is online [v4,05/12] riscv: mm: Combine the SMP and UP TLB flush code [v4,06/12] riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma [v4,07/12] riscv: Avoid TLB flush loops when affected by SiFive CIP-1200 [v4,08/12] riscv: mm: Introduce cntx2asid/cntx2version helper macros [v4,09/12] riscv: mm: Use a fixed layout for the MM context ID [v4,10/12] riscv: mm: Make asid_bits a local variable [v4,11/12] riscv: mm: Preserve global TLB entries when switching contexts [v4,12/12] riscv: mm: Always use an ASID to flush mm contexts

Commit Message

Samuel Holland Jan. 2, 2024, 10 p.m. UTC

  This variable is only used inside asids_init().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---

(no changes since v1)

 arch/riscv/mm/context.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Jisheng Zhang Jan. 3, 2024, 3 p.m. UTC | #1

On Tue, Jan 02, 2024 at 02:00:47PM -0800, Samuel Holland wrote:
> This variable is only used inside asids_init().

This is due to patch9, so can be folded into patch9.

> 
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> 
> (no changes since v1)
> 
>  arch/riscv/mm/context.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
> index b5170ac1b742..43a8bc2d5af4 100644
> --- a/arch/riscv/mm/context.c
> +++ b/arch/riscv/mm/context.c
> @@ -20,7 +20,6 @@
>  
>  DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
>  
> -static unsigned long asid_bits;
>  static unsigned long num_asids;
>  
>  static atomic_long_t current_version;
> @@ -226,7 +225,7 @@ static inline void set_mm(struct mm_struct *prev,
>  
>  static int __init asids_init(void)
>  {
> -	unsigned long old;
> +	unsigned long asid_bits, old;
>  
>  	/* Figure-out number of ASID bits in HW */
>  	old = csr_read(CSR_SATP);
> -- 
> 2.42.0
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Alexandre Ghiti Jan. 4, 2024, 12:47 p.m. UTC | #2

On Tue, Jan 2, 2024 at 11:01 PM Samuel Holland
<samuel.holland@sifive.com> wrote:
>
> This variable is only used inside asids_init().
>
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
>
> (no changes since v1)
>
>  arch/riscv/mm/context.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
> index b5170ac1b742..43a8bc2d5af4 100644
> --- a/arch/riscv/mm/context.c
> +++ b/arch/riscv/mm/context.c
> @@ -20,7 +20,6 @@
>
>  DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
>
> -static unsigned long asid_bits;
>  static unsigned long num_asids;
>
>  static atomic_long_t current_version;
> @@ -226,7 +225,7 @@ static inline void set_mm(struct mm_struct *prev,
>
>  static int __init asids_init(void)
>  {
> -       unsigned long old;
> +       unsigned long asid_bits, old;
>
>         /* Figure-out number of ASID bits in HW */
>         old = csr_read(CSR_SATP);
> --
> 2.42.0
>

You can add:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

Thanks,

Alex

Samuel Holland Jan. 4, 2024, 3:49 p.m. UTC | #3

On 2024-01-03 9:00 AM, Jisheng Zhang wrote:
> On Tue, Jan 02, 2024 at 02:00:47PM -0800, Samuel Holland wrote:
>> This variable is only used inside asids_init().
> 
> This is due to patch9, so can be folded into patch9.

I'm not sure what you mean here. Patch 9 does not touch any references to the
asid_bits variable, though it does touch adjacent lines.

>>
>> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
>> ---
>>
>> (no changes since v1)
>>
>>  arch/riscv/mm/context.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
>> index b5170ac1b742..43a8bc2d5af4 100644
>> --- a/arch/riscv/mm/context.c
>> +++ b/arch/riscv/mm/context.c
>> @@ -20,7 +20,6 @@
>>  
>>  DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
>>  
>> -static unsigned long asid_bits;
>>  static unsigned long num_asids;
>>  
>>  static atomic_long_t current_version;
>> @@ -226,7 +225,7 @@ static inline void set_mm(struct mm_struct *prev,
>>  
>>  static int __init asids_init(void)
>>  {
>> -	unsigned long old;
>> +	unsigned long asid_bits, old;
>>  
>>  	/* Figure-out number of ASID bits in HW */
>>  	old = csr_read(CSR_SATP);
>> -- 
>> 2.42.0
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

diff mbox series

Patch

diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
index b5170ac1b742..43a8bc2d5af4 100644
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
@@ -20,7 +20,6 @@ 
 
 DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
 
-static unsigned long asid_bits;
 static unsigned long num_asids;
 
 static atomic_long_t current_version;
@@ -226,7 +225,7 @@  static inline void set_mm(struct mm_struct *prev,
 
 static int __init asids_init(void)
 {
-	unsigned long old;
+	unsigned long asid_bits, old;
 
 	/* Figure-out number of ASID bits in HW */
 	old = csr_read(CSR_SATP);