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c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709566600; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pAhWJDZy3Qxtd03byX/QomLU+QUbXtxsEhEbMTufqk0=; b=Kc17rCqkc6LOuhYPwzljGg/aEZQJ8pXDhF6R5AXxVwGA3rWUtr6nJ+P/hf1YcshHcsgfln r3emNG6lXMTbJ0PzSHKu5p+6lxRGBaBfH5U26dL9aGFQilO5dcI04j9QqvWFLrX6gLXu55 44G9/+PQVO9Js+sc7Ok4WYHoEFsPLM5dIM3oceE8QEYk4r1obpEnDwGTkDTW8HN9OIvNMb T2EUi1aDs0gMPskOlN08SRld8nN/yfZ6LT4POBBN2f26/mqHy+7JiM54p4LFoC+FRGzIDC +Ul80YVITQ4Tlr/nA2VCuukU/XrDcfSEDHcq2vNFaMcme9jU19vIfIJ+TQnjZA== From: Thomas Richard Date: Mon, 04 Mar 2024 16:36:00 +0100 Subject: [PATCH v4 17/18] PCI: j721e: Add reset GPIO to struct j721e_pcie Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240102-j7200-pcie-s2r-v4-17-6f1f53390c85@bootlin.com> References: <20240102-j7200-pcie-s2r-v4-0-6f1f53390c85@bootlin.com> In-Reply-To: <20240102-j7200-pcie-s2r-v4-0-6f1f53390c85@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Tony Lindgren , Haojian Zhuang , Vignesh R , Aaro Koskinen , Janusz Krzysztofik , Andi Shyti , Peter Rosin , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org, linux-phy@lists.infradead.org, linux-pci@vger.kernel.org, gregory.clement@bootlin.com, theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com, u-kumar1@ti.com, Thomas Richard X-Mailer: b4 0.12.0 X-GND-Sasl: thomas.richard@bootlin.com X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792610850726121294 X-GMAIL-MSGID: 1792610850726121294 From: Théo Lebrun Add reset GPIO to struct j721e_pcie, so it can be used at suspend and resume stages. Signed-off-by: Théo Lebrun Signed-off-by: Thomas Richard --- drivers/pci/controller/cadence/pci-j721e.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 98484f001562..9af4fd64c1f9 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -52,6 +52,7 @@ struct j721e_pcie { u32 mode; u32 num_lanes; u32 max_lanes; + struct gpio_desc *reset_gpio; void __iomem *user_cfg_base; void __iomem *intd_cfg_base; u32 linkdown_irq_regfield; @@ -508,6 +509,7 @@ static int j721e_pcie_probe(struct platform_device *pdev) ret = dev_err_probe(dev, PTR_ERR(gpiod), "Failed to get reset GPIO\n"); goto err_get_sync; } + pcie->reset_gpio = gpiod; ret = cdns_pcie_init_phy(dev, cdns_pcie); if (ret) {