Message ID | 20231227130812.148914-2-eugen.hristev@collabora.com |
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State | New |
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(cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: ehristev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id B7CC137802F2; Wed, 27 Dec 2023 13:08:21 +0000 (UTC) From: Eugen Hristev <eugen.hristev@collabora.com> To: bin.liu@mediatek.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Allen-KH Cheng <allen-kh.cheng@mediatek.com>, Hsin-Yi Wang <hsinyi@chromium.org>, Max Staudt <mstaudt@chromium.org>, Ricardo Ribalda <ribalda@chromium.org>, Eugen Hristev <eugen.hristev@collabora.com> Subject: [PATCH 2/2] arm64: dts: mediatek: mt8186: Add jpgenc node Date: Wed, 27 Dec 2023 15:08:12 +0200 Message-Id: <20231227130812.148914-2-eugen.hristev@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231227130812.148914-1-eugen.hristev@collabora.com> References: <20231227130812.148914-1-eugen.hristev@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786440630528884780 X-GMAIL-MSGID: 1786440630528884780 |
Series |
[1/2] dt-bindings: media: mediatek-jpeg-encoder: change max ioomus count
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Commit Message
Eugen Hristev
Dec. 27, 2023, 1:08 p.m. UTC
From: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Add JPEG encoder node. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Max Staudt <mstaudt@chromium.org> Tested-by: Max Staudt <mstaudt@chromium.org> Reviewed-by: Ricardo Ribalda <ribalda@chromium.org> [eugen.hristev@collabora.com: minor cleanup] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Comments
Il 27/12/23 14:08, Eugen Hristev ha scritto: > From: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > Add JPEG encoder node. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> > Reviewed-by: Max Staudt <mstaudt@chromium.org> > Tested-by: Max Staudt <mstaudt@chromium.org> > Reviewed-by: Ricardo Ribalda <ribalda@chromium.org> > [eugen.hristev@collabora.com: minor cleanup] > Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index e451b6c8cd9e..ef1b269f9184 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -2054,6 +2054,19 @@ venc: video-encoder@17020000 { > mediatek,scp = <&scp>; > }; > > + jpgenc: jpgenc@17030000 { Can we please call this jpeg-encoder@17030000 instead? > + compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc"; > + reg = <0 0x17030000 0 0x10000>; > + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&vencsys CLK_VENC_CKE2_JPGENC>; > + clock-names = "jpgenc"; clock-names ... iommus .... power-domains ... Cheers, Angelo
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index e451b6c8cd9e..ef1b269f9184 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -2054,6 +2054,19 @@ venc: video-encoder@17020000 { mediatek,scp = <&scp>; }; + jpgenc: jpgenc@17030000 { + compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc"; + reg = <0 0x17030000 0 0x10000>; + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&vencsys CLK_VENC_CKE2_JPGENC>; + clock-names = "jpgenc"; + power-domains = <&spm MT8186_POWER_DOMAIN_VENC>; + iommus = <&iommu_mm IOMMU_PORT_L7_JPGENC_Y_RDMA>, + <&iommu_mm IOMMU_PORT_L7_JPGENC_C_RDMA>, + <&iommu_mm IOMMU_PORT_L7_JPGENC_Q_TABLE>, + <&iommu_mm IOMMU_PORT_L7_JPGENC_BSDMA>; + }; + camsys: clock-controller@1a000000 { compatible = "mediatek,mt8186-camsys"; reg = <0 0x1a000000 0 0x1000>;