From patchwork Wed Dec 27 12:32:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elad Nachman X-Patchwork-Id: 183467 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp1403324dyb; Wed, 27 Dec 2023 04:35:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IH05pr9yaRzq1ugrbM+rCU4kdtbrbmbPOYRXj34hmnfDTETEpEq44QzAjHnHUH/k8AjdeVx X-Received: by 2002:a50:d59b:0:b0:553:2dc2:4b9b with SMTP id v27-20020a50d59b000000b005532dc24b9bmr5858452edi.14.1703680519301; Wed, 27 Dec 2023 04:35:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703680519; cv=none; d=google.com; s=arc-20160816; b=i5iBjVYXBiRi2MoxN5/HC9nVe3XEm5IEmgTbfbrzLmFAQgPxhKscF4FjRWfWMzZnT6 uaqJvhO+lZNrw4hJ0LwbjhqDCAObJfEkOkOTTzJrDIqsAac9eum5IKoXHpbMndJa6Z9R u8gZfTeESl0ZVH7fuZFs8sUKgC0xgsU+xYZvHTzTxBneIkLPLB2yDpf9HyfHQ5NmSd1s /S+oYeP47xZNmEBvlu15OyOiPU3o4BJ/V9MBGhPooeN91S/J3gE5jAU3QNTWi5MhAroi P6eGWIT4TRKRcn/vDahZIQJ3MAhO1jrBBsHnIDMlczocyKQYc3wOiz7/Y3MLZoh/IjQU ZBYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=P+CNI8fEbtJTG2nlkv45CYvpbybvL7KVNMn2ypOZHMk=; fh=gUsdpqECuFRqkI6OLGGDZtcyjTAYHWd8Ae+sgxxg3lQ=; b=Dhu8+OvpMAF4tE8fKAkUOxFUKFrrBsdqQ9/okXp2Bi0GZO40gnTT4gRSYK8OtKOdzU Rhp0HcZ1f4GUbacJn10kGzLyXI1rTtQwNg6dBLyWRPnTB2T08nV6mmUghNW/LWiiBsyu 0C95cyctpWhTnixFpzCHDXwC54KbCInHWOcGkmIptk/aDp9h4VrHls5tEnOcjXJcyfLN kLqn/jOoSDKNzLNZEsJEbz/NccG6isoOUaxz2vW/UQTs80y+L2aw397MNdCngS5o5uux SCKLOju4DHdGaDK487wErzW6XbQ9176DZdzqB9KlrGveGIaYt0vu2RPfPI06H2iRA696 eHhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=Mio+w+2G; spf=pass (google.com: domain of linux-kernel+bounces-12014-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-12014-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id c39-20020a509faa000000b005551bd4817asi1474327edf.308.2023.12.27.04.35.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Dec 2023 04:35:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-12014-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=Mio+w+2G; spf=pass (google.com: domain of linux-kernel+bounces-12014-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-12014-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id E6FAC1F22E44 for ; Wed, 27 Dec 2023 12:35:18 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EC81B45C13; Wed, 27 Dec 2023 12:34:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="Mio+w+2G" X-Original-To: linux-kernel@vger.kernel.org Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2434644C6D; Wed, 27 Dec 2023 12:34:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.helo=mx0b-0016f401.pphosted.com Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 3BQMH2tL021935; Wed, 27 Dec 2023 04:33:26 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=P+CNI8fEbtJTG2nlkv45CYvpbybvL7KVNMn2ypOZHMk=; b=Mio +w+2G1P7ggxrZBKCaBv2aJBe601ao+Ly9MoiZGUxYoii3FGt987WwHjzfR98/fAc iDGnpLstkztu+C05BnqMeOgFS9nKmTrZ+gsWLWxmvW96Tpo3isamr1XNGS5aZnJo d5msX/6mqtRsKMDRxpjtBoKaHydRPet4vZV4TnW2ewoX0F0mpCHqzRoaa1E1HOEp DQ12ZD6xd4rSj/dGVgFY4wLreZHXVLG+hBGI6ZJsXubL4bB0UwO79/1ZFfhUCE73 zU9z3r4vBpXaTCzrhVXHP6kBxUE60+PUeGfKrN9745lg3P7a8fRNwTrIxjmM4xbc faWCmvfXmgKb5DEskNQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3v5yxp0a5x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 27 Dec 2023 04:33:25 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 27 Dec 2023 04:33:23 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 27 Dec 2023 04:33:23 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id 8D8165B6933; Wed, 27 Dec 2023 04:33:17 -0800 (PST) From: Elad Nachman To: , , , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH 3/4] arm64: dts: ac5: add mmc node and clock Date: Wed, 27 Dec 2023 14:32:56 +0200 Message-ID: <20231227123257.1170590-4-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231227123257.1170590-1-enachman@marvell.com> References: <20231227123257.1170590-1-enachman@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: ewsmlGZgsY4Tm6ZHwAxGaGZEcgmGdzFE X-Proofpoint-GUID: ewsmlGZgsY4Tm6ZHwAxGaGZEcgmGdzFE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786438504420694367 X-GMAIL-MSGID: 1786438504420694367 From: Elad Nachman Add mmc and mmc clock nodes to ac5 and ac5x device tree files Signed-off-by: Elad Nachman --- arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 33 ++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index b5e042b8e929..decad14d0db8 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -77,7 +77,6 @@ soc { #address-cells = <2>; #size-cells = <2>; ranges; - dma-ranges; internal-regs@7f000000 { #address-cells = <1>; @@ -204,6 +203,31 @@ gpio1: gpio@18140 { }; }; + mmc_dma: mmc-dma-peripherals@80500000 { + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>; + dma-coherent; + + sdhci: mmc@805c0000 { + compatible = "marvell,ac5-sdhci", + "marvell,armada-ap806-sdhci"; + reg = <0x0 0x805c0000 0x0 0x1000>; + interrupts = ; + clocks = <&emmc_clock>, <&cnm_clock>; + clock-names = "core", "axi"; + status = "okay"; + bus-width = <8>; + /*marvell,xenon-phy-slow-mode;*/ + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + }; + }; + /* * Dedicated section for devices behind 32bit controllers so we * can configure specific DMA mapping for them @@ -335,5 +359,12 @@ nand_clock: nand-clock { #clock-cells = <0>; clock-frequency = <400000000>; }; + + emmc_clock: emmc_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; + }; };