[3/4] arm64: dts: ac5: add mmc node and clock
Commit Message
From: Elad Nachman <enachman@marvell.com>
Add mmc and mmc clock nodes to ac5 and ac5x device tree files
Signed-off-by: Elad Nachman <enachman@marvell.com>
---
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 33 ++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
Comments
On 27/12/2023 13:32, Elad Nachman wrote:
> From: Elad Nachman <enachman@marvell.com>
>
> Add mmc and mmc clock nodes to ac5 and ac5x device tree files
>
> Signed-off-by: Elad Nachman <enachman@marvell.com>
> ---
> arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 33 ++++++++++++++++++-
> 1 file changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
> index b5e042b8e929..decad14d0db8 100644
> --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
> @@ -77,7 +77,6 @@ soc {
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
> - dma-ranges;
>
> internal-regs@7f000000 {
> #address-cells = <1>;
> @@ -204,6 +203,31 @@ gpio1: gpio@18140 {
> };
> };
>
> + mmc_dma: mmc-dma-peripherals@80500000 {
Generic node name, so bus@?
> + compatible = "simple-bus";
> + #address-cells = <0x2>;
> + #size-cells = <0x2>;
> + ranges;
ranges is second.
You have address/size cells, so are you sure dtbs W=1 does not complain?
> + dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>;
> + dma-coherent;
> +
> + sdhci: mmc@805c0000 {
> + compatible = "marvell,ac5-sdhci",
> + "marvell,armada-ap806-sdhci";
> + reg = <0x0 0x805c0000 0x0 0x1000>;
> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&emmc_clock>, <&cnm_clock>;
> + clock-names = "core", "axi";
> + status = "okay";
Drop
> + bus-width = <8>;
> + /*marvell,xenon-phy-slow-mode;*/
Drop or explain why commented code should be here.
> + non-removable;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + };
> + };
> +
> /*
> * Dedicated section for devices behind 32bit controllers so we
> * can configure specific DMA mapping for them
> @@ -335,5 +359,12 @@ nand_clock: nand-clock {
> #clock-cells = <0>;
> clock-frequency = <400000000>;
> };
> +
> + emmc_clock: emmc_clock {
No underscores in node names. I think you got such feedback before.
But anyway, this looks like a fake clock.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <400000000>;
> + };
> +
Drop
> };
> };
Best regards,
Krzysztof
@@ -77,7 +77,6 @@ soc {
#address-cells = <2>;
#size-cells = <2>;
ranges;
- dma-ranges;
internal-regs@7f000000 {
#address-cells = <1>;
@@ -204,6 +203,31 @@ gpio1: gpio@18140 {
};
};
+ mmc_dma: mmc-dma-peripherals@80500000 {
+ compatible = "simple-bus";
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ ranges;
+ dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>;
+ dma-coherent;
+
+ sdhci: mmc@805c0000 {
+ compatible = "marvell,ac5-sdhci",
+ "marvell,armada-ap806-sdhci";
+ reg = <0x0 0x805c0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&emmc_clock>, <&cnm_clock>;
+ clock-names = "core", "axi";
+ status = "okay";
+ bus-width = <8>;
+ /*marvell,xenon-phy-slow-mode;*/
+ non-removable;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ };
+ };
+
/*
* Dedicated section for devices behind 32bit controllers so we
* can configure specific DMA mapping for them
@@ -335,5 +359,12 @@ nand_clock: nand-clock {
#clock-cells = <0>;
clock-frequency = <400000000>;
};
+
+ emmc_clock: emmc_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
+
};
};