| Message ID | 20231226122113.v3.5.Ia598792a1386cca61844068be03c3ccec9e81753@changeid |
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From: Mark Hasemeyer <markhas@chromium.org>
To: LKML <linux-kernel@vger.kernel.org>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
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Enric Balletbo i Serra <eballetbo@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
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linux-tegra@vger.kernel.org
Subject: [PATCH v3 05/24] ARM: dts: tegra: Enable cros-ec-spi as wake source
Date: Tue, 26 Dec 2023 12:21:09 -0700
Message-ID:
<20231226122113.v3.5.Ia598792a1386cca61844068be03c3ccec9e81753@changeid>
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| Series |
Improve IRQ wake capability reporting and update the cros_ec driver to use it
|
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Commit Message
Mark Hasemeyer
Dec. 26, 2023, 7:21 p.m. UTC
The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.
Some Chromebooks use a separate wake pin, while others overload the
interrupt for wake and IO. With the current assumption, spurious wakes
can occur on systems that use a separate wake pin. It is planned to
update the driver to no longer assume that the EC interrupt pin should
be enabled for wake.
Add the wakeup-source property to all cros-ec-spi compatible device
nodes to signify to the driver that they should still be a valid wakeup
source.
-Commit-changes: 3
-Update commit message to provide details of the motivation behind the
change
Signed-off-by: Mark Hasemeyer <markhas@chromium.org>
---
(no changes since v2)
Changes in v2:
-Split by arch/soc
arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 +
arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi index a2ee371802004..8125c1b3e8d79 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -338,6 +338,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts index 3924ee385dee0..df98dc2a67b85 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -857,6 +857,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>;