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Wysocki" , Len Brown , Anup Patel , Thomas Gleixner , Bjorn Helgaas , Haibo Xu , Conor Dooley , Andrew Jones , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Marc Zyngier , Sunil V L Subject: [RFC PATCH v3 11/17] irqchip: riscv-aplic: Add ACPI support Date: Tue, 19 Dec 2023 23:15:20 +0530 Message-Id: <20231219174526.2235150-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231219174526.2235150-1-sunilvl@ventanamicro.com> References: <20231219174526.2235150-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785733571942490556 X-GMAIL-MSGID: 1785733571942490556 Add ACPI support in APLIC drivers. In ACPI, IO devices use Global System Interrupts (GSI) which is a flat space split across multiple APLICs. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 6 +++ drivers/irqchip/irq-riscv-aplic-direct.c | 21 +++++--- drivers/irqchip/irq-riscv-aplic-main.c | 64 ++++++++++++++---------- drivers/irqchip/irq-riscv-aplic-main.h | 1 + drivers/irqchip/irq-riscv-aplic-msi.c | 9 +++- 5 files changed, 66 insertions(+), 35 deletions(-) diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index 232314e5f007..df59192a157d 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -22,6 +22,12 @@ #define APLIC_PLIC_ID(x) ((x) >> 24) #define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff) +#ifdef CONFIG_RISCV_APLIC +struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi); +#else +static inline struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) { return NULL; } +#endif + int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid); int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid); void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts); diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 9ed2666bfb5e..3e7a7e092120 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -4,6 +4,7 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include @@ -14,6 +15,7 @@ #include #include #include +#include #include "irq-riscv-aplic-main.h" @@ -203,17 +205,20 @@ static int aplic_direct_starting_cpu(unsigned int cpu) static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, u32 *parent_hwirq, - unsigned long *parent_hartid) + unsigned long *parent_hartid, + struct aplic_priv *priv) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + rc = acpi_get_ext_intc_parent_hartid(priv->id, index, parent_hartid); + if (rc) + return rc; + + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), index, &parent); if (rc) @@ -251,7 +256,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) /* Setup per-CPU IDC and target CPU mask */ for (i = 0; i < priv->nr_idcs; i++) { - rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid); + rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid, priv); if (rc) { dev_warn(dev, "parent irq for IDC%d not found\n", i); continue; diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c index d1b342b66551..31434b3ff690 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.c +++ b/drivers/irqchip/irq-riscv-aplic-main.c @@ -4,12 +4,15 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include #include #include #include +#include +#include #include "irq-riscv-aplic-main.h" @@ -137,38 +140,44 @@ int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs) { struct of_phandle_args parent; + struct acpi_madt_aplic *aplic; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; - /* Save device pointer and register base */ priv->dev = dev; priv->regs = regs; - /* Find out number of interrupt sources */ - rc = of_property_read_u32(to_of_node(dev->fwnode), - "riscv,num-sources", - &priv->nr_irqs); - if (rc) { - dev_err(dev, "failed to get number of interrupt sources\n"); - return rc; - } - - /* - * Find out number of IDCs based on parent interrupts - * - * If "msi-parent" property is present then we ignore the - * APLIC IDCs which forces the APLIC driver to use MSI mode. - */ - if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { - while (!of_irq_parse_one(to_of_node(dev->fwnode), - priv->nr_idcs, &parent)) - priv->nr_idcs++; + if (is_of_node(dev->fwnode)) { + /* Find out number of interrupt sources */ + rc = of_property_read_u32(to_of_node(dev->fwnode), + "riscv,num-sources", + &priv->nr_irqs); + if (rc) { + dev_err(dev, "failed to get number of interrupt sources\n"); + return rc; + } + + /* + * Find out number of IDCs based on parent interrupts + * + * If "msi-parent" property is present then we ignore the + * APLIC IDCs which forces the APLIC driver to use MSI mode. + */ + if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { + while (!of_irq_parse_one(to_of_node(dev->fwnode), + priv->nr_idcs, &parent)) + priv->nr_idcs++; + } + } else { + aplic = *(struct acpi_madt_aplic **)dev_get_platdata(dev); + if (!aplic) { + dev_err(dev, "APLIC platform data is NULL!\n"); + return -1; + } + priv->gsi_base = aplic->gsi_base; + priv->nr_irqs = aplic->num_sources; + priv->nr_idcs = aplic->num_idcs; + priv->id = aplic->id; } /* Setup initial state APLIC interrupts */ @@ -204,6 +213,9 @@ static int aplic_probe(struct platform_device *pdev) if (is_of_node(dev->fwnode)) msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent"); + else + msi_mode = imsic_acpi_get_fwnode(NULL) ? 1 : 0; + if (msi_mode) rc = aplic_msi_setup(dev, regs); else diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h index 78267ec58098..dc022e89bc97 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.h +++ b/drivers/irqchip/irq-riscv-aplic-main.h @@ -28,6 +28,7 @@ struct aplic_priv { u32 gsi_base; u32 nr_irqs; u32 nr_idcs; + u32 id; void __iomem *regs; struct aplic_msicfg msicfg; }; diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c index 086d00e0429e..03a8ac6554c4 100644 --- a/drivers/irqchip/irq-riscv-aplic-msi.c +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -178,6 +178,7 @@ static void aplic_msi_write_msg(struct msi_desc *desc, struct msi_msg *msg) int aplic_msi_setup(struct device *dev, void __iomem *regs) { const struct imsic_global_config *imsic_global; + struct irq_domain *msi_domain; struct irq_domain *irqdomain; struct aplic_priv *priv; struct aplic_msicfg *mc; @@ -261,8 +262,14 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs) * IMSIC and the IMSIC MSI domains are created later through * the platform driver probing so we set it explicitly here. */ - if (is_of_node(dev->fwnode)) + if (is_of_node(dev->fwnode)) { of_msi_configure(dev, to_of_node(dev->fwnode)); + } else { + msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev), + DOMAIN_BUS_PLATFORM_MSI); + if (msi_domain) + dev_set_msi_domain(dev, msi_domain); + } } /* Create irq domain instance for the APLIC MSI-mode */