Message ID | 20231219-topic-8180_pcie_dmac-v1-1-5d00fc1b23fd@linaro.org |
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State | New |
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Series |
arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent
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Commit Message
Konrad Dybcio
Dec. 19, 2023, 6:40 p.m. UTC
The PCIe controllers on 8180 are cache-coherent. Mark them as such.
Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 4 ++++
1 file changed, 4 insertions(+)
---
base-commit: aa4db8324c4d0e67aa4670356df4e9fae14b4d37
change-id: 20231219-topic-8180_pcie_dmac-b9d6d657bc83
Best regards,
Comments
On Tue, 19 Dec 2023 19:40:21 +0100, Konrad Dybcio wrote: > The PCIe controllers on 8180 are cache-coherent. Mark them as such. > > Applied, thanks! [1/1] arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent commit: 1b3319e8055f7b18bdc0fae0fa7847b905c38bb6 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index fe761d6d0dd3..61475e56cef3 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -1751,6 +1751,7 @@ pcie0: pcie@1c00000 { phys = <&pcie0_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -1847,6 +1848,7 @@ pcie3: pcie@1c08000 { phys = <&pcie3_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -1944,6 +1946,7 @@ pcie1: pcie@1c10000 { phys = <&pcie1_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -2041,6 +2044,7 @@ pcie2: pcie@1c18000 { phys = <&pcie2_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; };