[1/2] crypto: iaa - Change desc->priv to 0

Message ID 20231218204715.220299-2-tom.zanussi@linux.intel.com
State New
Headers
Series crypto: Intel Analytics Accelerator (IAA) updates |

Commit Message

Tom Zanussi Dec. 18, 2023, 8:47 p.m. UTC
  In order for shared workqeues to work properly, desc->priv should be
set to 0 rather than 1.  The need for this is described in commit
f5ccf55e1028 (dmaengine/idxd: Re-enable kernel workqueue under DMA
API), so we need to make IAA consistent with IOMMU settings, otherwise
we get:

  [  141.948389] IOMMU: dmar15: Page request in Privilege Mode
  [  141.948394] dmar15: Invalid page request: 2000026a100101 ffffb167

Dedicated workqueues ignore this field and are unaffected.

Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
---
 drivers/crypto/intel/iaa/iaa_crypto_main.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
  

Comments

Dave Jiang Dec. 18, 2023, 9:47 p.m. UTC | #1
On 12/18/23 13:47, Tom Zanussi wrote:
> In order for shared workqeues to work properly, desc->priv should be
> set to 0 rather than 1.  The need for this is described in commit
> f5ccf55e1028 (dmaengine/idxd: Re-enable kernel workqueue under DMA
> API), so we need to make IAA consistent with IOMMU settings, otherwise
> we get:
> 
>   [  141.948389] IOMMU: dmar15: Page request in Privilege Mode
>   [  141.948394] dmar15: Invalid page request: 2000026a100101 ffffb167
> 
> Dedicated workqueues ignore this field and are unaffected.
> 
> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> ---
>  drivers/crypto/intel/iaa/iaa_crypto_main.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/intel/iaa/iaa_crypto_main.c
> index eafa2dd7a5bb..5093361b0107 100644
> --- a/drivers/crypto/intel/iaa/iaa_crypto_main.c
> +++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c
> @@ -484,7 +484,7 @@ static int decompress_header(struct iaa_device_compression_mode *device_mode,
>  
>  	desc->decompr_flags = mode->gen_decomp_table_flags;
>  
> -	desc->priv = 1;
> +	desc->priv = 0;
>  
>  	desc->completion_addr = idxd_desc->compl_dma;
>  
> @@ -1255,7 +1255,7 @@ static int iaa_compress(struct crypto_tfm *tfm,	struct acomp_req *req,
>  		IDXD_OP_FLAG_RD_SRC2_AECS | IDXD_OP_FLAG_CC;
>  	desc->opcode = IAX_OPCODE_COMPRESS;
>  	desc->compr_flags = IAA_COMP_FLAGS;
> -	desc->priv = 1;
> +	desc->priv = 0;
>  
>  	desc->src1_addr = (u64)src_addr;
>  	desc->src1_size = slen;
> @@ -1409,7 +1409,7 @@ static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,
>  	desc->flags = IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC;
>  	desc->opcode = IAX_OPCODE_DECOMPRESS;
>  	desc->decompr_flags = IAA_DECOMP_FLAGS | IAA_DECOMP_SUPPRESS_OUTPUT;
> -	desc->priv = 1;
> +	desc->priv = 0;
>  
>  	desc->src1_addr = (u64)dst_addr;
>  	desc->src1_size = *dlen;
> @@ -1495,7 +1495,7 @@ static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,
>  	desc->opcode = IAX_OPCODE_DECOMPRESS;
>  	desc->max_dst_size = PAGE_SIZE;
>  	desc->decompr_flags = IAA_DECOMP_FLAGS;
> -	desc->priv = 1;
> +	desc->priv = 0;
>  
>  	desc->src1_addr = (u64)src_addr;
>  	desc->dst_addr = (u64)dst_addr;
  
Fenghua Yu Dec. 18, 2023, 9:55 p.m. UTC | #2
On 12/18/23 12:47, Tom Zanussi wrote:
> In order for shared workqeues to work properly, desc->priv should be
> set to 0 rather than 1.  The need for this is described in commit
> f5ccf55e1028 (dmaengine/idxd: Re-enable kernel workqueue under DMA
> API), so we need to make IAA consistent with IOMMU settings, otherwise
> we get:
> 
>    [  141.948389] IOMMU: dmar15: Page request in Privilege Mode
>    [  141.948394] dmar15: Invalid page request: 2000026a100101 ffffb167
> 
> Dedicated workqueues ignore this field and are unaffected.
> 
> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>

Reviewed-by: Fenghua Yu <fenghua.yu@intel.com>

Thanks.

-Fenghua
  

Patch

diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/intel/iaa/iaa_crypto_main.c
index eafa2dd7a5bb..5093361b0107 100644
--- a/drivers/crypto/intel/iaa/iaa_crypto_main.c
+++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c
@@ -484,7 +484,7 @@  static int decompress_header(struct iaa_device_compression_mode *device_mode,
 
 	desc->decompr_flags = mode->gen_decomp_table_flags;
 
-	desc->priv = 1;
+	desc->priv = 0;
 
 	desc->completion_addr = idxd_desc->compl_dma;
 
@@ -1255,7 +1255,7 @@  static int iaa_compress(struct crypto_tfm *tfm,	struct acomp_req *req,
 		IDXD_OP_FLAG_RD_SRC2_AECS | IDXD_OP_FLAG_CC;
 	desc->opcode = IAX_OPCODE_COMPRESS;
 	desc->compr_flags = IAA_COMP_FLAGS;
-	desc->priv = 1;
+	desc->priv = 0;
 
 	desc->src1_addr = (u64)src_addr;
 	desc->src1_size = slen;
@@ -1409,7 +1409,7 @@  static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,
 	desc->flags = IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC;
 	desc->opcode = IAX_OPCODE_DECOMPRESS;
 	desc->decompr_flags = IAA_DECOMP_FLAGS | IAA_DECOMP_SUPPRESS_OUTPUT;
-	desc->priv = 1;
+	desc->priv = 0;
 
 	desc->src1_addr = (u64)dst_addr;
 	desc->src1_size = *dlen;
@@ -1495,7 +1495,7 @@  static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,
 	desc->opcode = IAX_OPCODE_DECOMPRESS;
 	desc->max_dst_size = PAGE_SIZE;
 	desc->decompr_flags = IAA_DECOMP_FLAGS;
-	desc->priv = 1;
+	desc->priv = 0;
 
 	desc->src1_addr = (u64)src_addr;
 	desc->dst_addr = (u64)dst_addr;